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Message-ID: <6a10616b-3234-4336-aff6-4e60047ebcb6@gmail.com>
Date: Fri, 22 Aug 2025 15:59:53 +0200
From: Clément Le Goffic <legoffic.clement@...il.com>
To: Krzysztof Kozlowski <krzk@...nel.org>, Rob Herring <robh@...nel.org>,
Clément Le Goffic <clement.legoffic@...s.st.com>
Cc: Will Deacon <will@...nel.org>, Mark Rutland <mark.rutland@....com>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Philipp Zabel <p.zabel@...gutronix.de>, Jonathan Corbet <corbet@....net>,
Gatien Chevallier <gatien.chevallier@...s.st.com>,
Michael Turquette <mturquette@...libre.com>, Stephen Boyd
<sboyd@...nel.org>, Gabriel Fernandez <gabriel.fernandez@...s.st.com>,
Julius Werner <jwerner@...omium.org>, linux-arm-kernel@...ts.infradead.org,
linux-perf-users@...r.kernel.org, devicetree@...r.kernel.org,
linux-stm32@...md-mailman.stormreply.com, linux-kernel@...r.kernel.org,
linux-doc@...r.kernel.org, linux-clk@...r.kernel.org
Subject: Re: [PATCH v5 06/20] dt-bindings: memory: introduce DDR4
Hi Krzysztof,
On 17/08/2025 09:19, Krzysztof Kozlowski wrote:
> On 14/08/2025 16:42, Clément Le Goffic wrote:
>> Hi Rob,
>>
>> On 30/07/2025 23:11, Rob Herring wrote:
>>> On Mon, Jul 28, 2025 at 05:29:37PM +0200, Clément Le Goffic wrote:
>>>> Introduce JEDEC compliant DDR bindings, that use new memory-props binding.
>>>>
>>>> Signed-off-by: Clément Le Goffic <clement.legoffic@...s.st.com>
>>>> ---
>>>> .../memory-controllers/ddr/jedec,ddr4.yaml | 34 ++++++++++++++++++++++
>>>> 1 file changed, 34 insertions(+)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,ddr4.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,ddr4.yaml
>>>> new file mode 100644
>>>> index 000000000000..f457066a2f8b
>>>> --- /dev/null
>>>> +++ b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,ddr4.yaml
>>>> @@ -0,0 +1,34 @@
>>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>>> +%YAML 1.2
>>>> +---
>>>> +$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,ddr4.yaml#
>>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>>> +
>>>> +title: DDR3 SDRAM compliant to JEDEC JESD79-4D
>>>> +
>>>> +maintainers:
>>>> + - Krzysztof Kozlowski <krzk@...nel.org>
>>>> +
>>>> +allOf:
>>>> + - $ref: jedec,sdram-props.yaml#
>>>> +
>>>> +properties:
>>>> + compatible:
>>>> + items:
>>>> + - pattern: "^ddr4-[0-9a-f]{2},[0-9a-f]{1}$"
>>>
>>> Shouldn't this be 'jedec,ddr4-...'
>>
>> That's not the case for lpddr bindings, I wanted both lpddr and ddr
>> bindings to be similar but this can change.
>
> For LPDDR Julius introduced in commit 686fe63b2280 ("dt-bindings:
> memory: Add numeric LPDDR compatible string variant") ddr4-VENDORID
> pattern to distinguish individual manufacturers.
>
> Jedec is not really the vendor here.
>
> Is it the same case in DDR? You have a defined list of vendor IDs (also
> 1 byte)?
There is no defined list of vendor IDs.
The way the compatible string is created is explained in
jedec,sdram-props.yaml file which is created in patch 5 of this series.
Best regards,
Clément
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