linux-kernel - Re: [PATCH v1 17/19] dt-bindings: display: tegra: document Tegra20 and Tegra30 CSI

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Message-ID: <20250822140601.GA3496760-robh@kernel.org>
Date: Fri, 22 Aug 2025 09:06:01 -0500
From: Rob Herring <robh@...nel.org>
To: Svyatoslav Ryhel <clamor95@...il.com>
Cc: Thierry Reding <thierry.reding@...il.com>,
	Thierry Reding <treding@...dia.com>,
	Mikko Perttunen <mperttunen@...dia.com>,
	Jonathan Hunter <jonathanh@...dia.com>,
	Sowjanya Komatineni <skomatineni@...dia.com>,
	Luca Ceresoli <luca.ceresoli@...tlin.com>,
	David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
	Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
	Maxime Ripard <mripard@...nel.org>,
	Thomas Zimmermann <tzimmermann@...e.de>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Peter De Schrijver <pdeschrijver@...dia.com>,
	Prashant Gaikwad <pgaikwad@...dia.com>,
	Michael Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...nel.org>,
	Mauro Carvalho Chehab <mchehab@...nel.org>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Dmitry Osipenko <digetx@...il.com>,
	Charan Pedumuru <charan.pedumuru@...il.com>,
	linux-media@...r.kernel.org, linux-tegra@...r.kernel.org,
	dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
	linux-staging@...ts.linux.dev
Subject: Re: [PATCH v1 17/19] dt-bindings: display: tegra: document Tegra20
 and Tegra30 CSI

On Wed, Aug 20, 2025 at 08:39:36AM +0300, Svyatoslav Ryhel wrote:
> вт, 19 серп. 2025 р. о 23:30 Rob Herring <robh@...nel.org> пише:
> >
> > On Tue, Aug 19, 2025 at 03:16:29PM +0300, Svyatoslav Ryhel wrote:
> > > Document CSI hw block found in Tegra20 and Tegra30 SoC.
> > >
> > > Signed-off-by: Svyatoslav Ryhel <clamor95@...il.com>
> > > ---
> > >  .../display/tegra/nvidia,tegra210-csi.yaml    | 78 +++++++++++++++----
> > >  1 file changed, 63 insertions(+), 15 deletions(-)
> > >
> > > diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra210-csi.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra210-csi.yaml
> > > index fa07a40d1004..a5669447a33b 100644
> > > --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra210-csi.yaml
> > > +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra210-csi.yaml
> > > @@ -16,30 +16,78 @@ properties:
> > >
> > >    compatible:
> > >      enum:
> > > +      - nvidia,tegra20-csi
> > > +      - nvidia,tegra30-csi
> > >        - nvidia,tegra210-csi
> > >
> > >    reg:
> > >      maxItems: 1
> > >
> > > -  clocks:
> > > -    items:
> > > -      - description: module clock
> > > -      - description: A/B lanes clock
> > > -      - description: C/D lanes clock
> > > -      - description: E lane clock
> > > -      - description: test pattern generator clock
> > > -
> > > -  clock-names:
> > > -    items:
> > > -      - const: csi
> > > -      - const: cilab
> > > -      - const: cilcd
> > > -      - const: cile
> > > -      - const: csi_tpg
> > > +  clocks: true
> > > +  clock-names: true
> > >
> > >    power-domains:
> > >      maxItems: 1
> > >
> > > +allOf:
> > > +  - if:
> > > +      properties:
> > > +        compatible:
> > > +          contains:
> > > +            enum:
> > > +              - nvidia,tegra20-csi
> > > +    then:
> > > +      properties:
> > > +        clocks:
> > > +          items:
> > > +            - description: module clock
> > > +
> > > +        clock-names:
> > > +          items:
> > > +            - const: csi
> > > +  - if:
> > > +      properties:
> > > +        compatible:
> > > +          contains:
> > > +            enum:
> > > +              - nvidia,tegra30-csi
> > > +    then:
> > > +      properties:
> > > +        clocks:
> > > +          items:
> > > +            - description: module clock
> > > +            - description: PAD A clock
> > > +            - description: PAD B clock
> > > +
> > > +        clock-names:
> > > +          items:
> > > +            - const: csi
> > > +            - const: csia_pad
> > > +            - const: csib_pad
> > > +  - if:
> > > +      properties:
> > > +        compatible:
> > > +          contains:
> > > +            enum:
> > > +              - nvidia,tegra210-csi
> > > +    then:
> > > +      properties:
> > > +        clocks:
> > > +          items:
> > > +            - description: module clock
> > > +            - description: A/B lanes clock
> > > +            - description: C/D lanes clock
> > > +            - description: E lane clock
> > > +            - description: test pattern generator clock
> > > +
> > > +        clock-names:
> > > +          items:
> > > +            - const: csi
> > > +            - const: cilab
> > > +            - const: cilcd
> > > +            - const: cile
> > > +            - const: csi_tpg
> > > +
> >
> > This is longer that what's the same. I think this should be a separate
> > schema doc.
> >
> 
> CSI hw block configuration is similar between generations, the main
> difference is the amount of clocks routed. Not sure if it is worth it
> to create duplicates with sole difference in number of clocks used.

If the clock names were at least the same I might agree, but the only 
common one is 'csi'. How similar the h/w is doesn't matter, how similar 
the binding is is what matters.

Rob