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Message-ID: <e935e36a-1c5f-4706-830c-95cf6d9e6dc7@kzalloc.com>
Date: Sat, 23 Aug 2025 00:01:51 +0900
From: Yunseong Kim <ysk@...lloc.com>
To: Leo Yan <leo.yan@....com>
Cc: Peter Zijlstra <peterz@...radead.org>, Ingo Molnar <mingo@...hat.com>,
 Arnaldo Carvalho de Melo <acme@...nel.org>,
 Namhyung Kim <namhyung@...nel.org>, John Garry <john.g.garry@...cle.com>,
 Will Deacon <will@...nel.org>, James Clark <james.clark@...aro.org>,
 Mike Leach <mike.leach@...aro.org>, Leo Yan <leo.yan@...ux.dev>,
 Mark Rutland <mark.rutland@....com>,
 Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
 Jiri Olsa <jolsa@...nel.org>, Ian Rogers <irogers@...gle.com>,
 Adrian Hunter <adrian.hunter@...el.com>,
 "Liang, Kan" <kan.liang@...ux.intel.com>, Yeoreum Yun <yeoreum.yun@....com>,
 linux-arm-kernel@...ts.infradead.org, linux-perf-users@...r.kernel.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH] perf: arm64: Sync ESR_ELx_EC_* macros in
 arm64_exception_types.h with esr.h

Thank you for the review Leo!

On 8/21/25 8:38 PM, Leo Yan wrote:
> Hi,
> 
> On Thu, Aug 14, 2025 at 03:14:53PM +0000, Yunseong Kim wrote:
>> Update perf util arm64_exception_types.h to match the exception class
>> macros defined in tools/arch/arm64/include/asm/esr.h. This ensures
>> consistency between perf tooling and the kernel header definitions for
>> ESR_ELx_EC_* values.
>>
>> Signed-off-by: Yunseong Kim <ysk@...lloc.com>
> 
> Thanks for working on this.
> 
> This patch still misses couple macros, please see below.

I nearly missed that. Appreciate your checking.

>> ---
>>  tools/perf/arch/arm64/util/arm64_exception_types.h | 9 ++++++---
>>  1 file changed, 6 insertions(+), 3 deletions(-)
>>
>> diff --git a/tools/perf/arch/arm64/util/arm64_exception_types.h b/tools/perf/arch/arm64/util/arm64_exception_types.h
>> index 27c981ebe401..29931bf19062 100644
>> --- a/tools/perf/arch/arm64/util/arm64_exception_types.h
>> +++ b/tools/perf/arch/arm64/util/arm64_exception_types.h
>> @@ -33,7 +33,7 @@
>>  #define ESR_ELx_EC_PAC		(0x09)	/* EL2 and above */
>>  /* Unallocated EC: 0x0A - 0x0B */
> 
> #define ESR_ELx_EC_OTHER	(0x0A)
> 
>>  #define ESR_ELx_EC_CP14_64	(0x0C)
>> -/* Unallocated EC: 0x0d */
>> +#define ESR_ELx_EC_BTI		(0x0D)
>>  #define ESR_ELx_EC_ILL		(0x0E)
>>  /* Unallocated EC: 0x0F - 0x10 */
>>  #define ESR_ELx_EC_SVC32	(0x11)
>> @@ -46,7 +46,10 @@
>>  #define ESR_ELx_EC_SYS64	(0x18)
>>  #define ESR_ELx_EC_SVE		(0x19)
>>  #define ESR_ELx_EC_ERET		(0x1a)	/* EL2 only */
>> -/* Unallocated EC: 0x1b - 0x1E */
>> +/* Unallocated EC: 0x1B */
>> +#define ESR_ELx_EC_FPAC		(0x1C)	/* EL1 and above */
>> +#define ESR_ELx_EC_SME		(0x1D)
>> +/* Unallocated EC: 0x1E */
>>  #define ESR_ELx_EC_IMP_DEF	(0x1f)	/* EL3 only */
>>  #define ESR_ELx_EC_IABT_LOW	(0x20)
>>  #define ESR_ELx_EC_IABT_CUR	(0x21)
>> @@ -55,7 +58,7 @@
>>  #define ESR_ELx_EC_DABT_LOW	(0x24)
>>  #define ESR_ELx_EC_DABT_CUR	(0x25)
>>  #define ESR_ELx_EC_SP_ALIGN	(0x26)
>> -/* Unallocated EC: 0x27 */
>> +#define ESR_ELx_EC_MOPS		(0x27)
>>  #define ESR_ELx_EC_FP_EXC32	(0x28)
>>  /* Unallocated EC: 0x29 - 0x2B */
>>  #define ESR_ELx_EC_FP_EXC64	(0x2C)
> 
> #define ESR_ELx_EC_GCS		(0x2D)
> 
> Thanks,
> Leo
> 
>> -- 
>> 2.50.0
>>

I’ve sent out patch v2, Thanks everyone!

Best regards,
Yunseong Kim



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