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Message-ID: <c3e31030-4f4f-4235-84c7-93a62265bce5@ti.com>
Date: Fri, 22 Aug 2025 22:02:37 +0530
From: Beleswar Prasad Padhi <b-padhi@...com>
To: "Kumar, Udit" <u-kumar1@...com>, <nm@...com>, <vigneshr@...com>,
        <kristo@...nel.org>, <robh@...nel.org>, <krzk+dt@...nel.org>,
        <conor+dt@...nel.org>
CC: <afd@...com>, <hnagalla@...com>, <jm@...com>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 01/33] arm64: dts: ti: k3-j7200: Enable remote processors
 at board level

Hi Udit,

On 8/15/2025 8:00 AM, Kumar, Udit wrote:
> Hello Beleswar,
>
> On 8/15/2025 4:08 AM, Beleswar Padhi wrote:
>> Remote Processors defined in top-level J7200 SoC dtsi files are
>> incomplete without the memory carveouts and mailbox assignments which
>> are only known at board integration level.
>>
>> Therefore, disable the remote processors at SoC level and enable them at
>> board level where above information is available.
>>
>> Signed-off-by: Beleswar Padhi <b-padhi@...com>
>> ---
>>   arch/arm64/boot/dts/ti/k3-j7200-main.dtsi       | 3 +++
>>   arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 3 +++
>>   arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi     | 9 +++++++++
>>   3 files changed, 15 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi 
>> b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
>> index 5ce5f0a3d6f5..628ff89dd72f 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
>> @@ -1516,6 +1516,7 @@ main_r5fss0: r5fss@...0000 {
>>           ranges = <0x5c00000 0x00 0x5c00000 0x20000>,
>>                <0x5d00000 0x00 0x5d00000 0x20000>;
>>           power-domains = <&k3_pds 243 TI_SCI_PD_EXCLUSIVE>;
>> +        status = "disabled";
>>             main_r5fss0_core0: r5f@...0000 {
>>               compatible = "ti,j7200-r5f";
>> @@ -1530,6 +1531,7 @@ main_r5fss0_core0: r5f@...0000 {
>>               ti,atcm-enable = <1>;
>>               ti,btcm-enable = <1>;
>>               ti,loczrama = <1>;
>> +            status = "disabled";
>>           };
>>             main_r5fss0_core1: r5f@...0000 {
>> @@ -1545,6 +1547,7 @@ main_r5fss0_core1: r5f@...0000 {
>>               ti,atcm-enable = <1>;
>>               ti,btcm-enable = <1>;
>>               ti,loczrama = <1>;
>> +            status = "disabled";
>>           };
>>       };
>>   diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi 
>> b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
>> index 56ab144fea07..692c4745040e 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
>> @@ -612,6 +612,7 @@ mcu_r5fss0: r5fss@...00000 {
>>           ranges = <0x41000000 0x00 0x41000000 0x20000>,
>>                <0x41400000 0x00 0x41400000 0x20000>;
>>           power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>;
>> +        status = "disabled";
>
> Please leave boot critical fw as is.


The nodes that are disabled here, are enabled back in the
board level files. So, it has no effective change on the boards.

>
> Here are my suggestions
>
>  create one boot-critical-fw-dtsi for mcu_r5fss0 , include this fw 
> files in all boards.


That is the plan for a future series :)

Thanks,
Beleswar

>
> other IPC optional firmware can reside in one dtsi or dtso,
>
>
>> [..]

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