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Message-ID: <yf5bw6hesd2vpvum77zprr27oyedaglhafumx5netfqzxcy3cg@2r3l5w3ddns7>
Date: Fri, 22 Aug 2025 21:13:28 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: Neil Armstrong <neil.armstrong@...aro.org>
Cc: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 0/9] arm64: dts: qcom: Set up 4-lane DP for sm8[56]50
& x1e boards
On Fri, Aug 22, 2025 at 05:56:48PM +0200, Neil Armstrong wrote:
> Now the 4lanes support in the QMP Combo PHY has been merged in [1],
> add the required plumbing in DT.
>
> [1] https://lore.kernel.org/all/20250807-topic-4ln_dp_respin-v4-0-43272d6eca92@oss.qualcomm.com/
>
> Signed-off-by: Neil Armstrong <neil.armstrong@...aro.org>
> ---
> Changes in v3:
> - Move the data-lanes in the SoC dtsi, and update it there
> - Link to v2: https://lore.kernel.org/r/20250822-topic-x1e80100-4lanes-v2-0-4b21372b1901@linaro.org
>
> Changes in v2:
> - Add missing x1-asus-zenbook-a14 & x1-crd
> - Link to v1: https://lore.kernel.org/r/20250821-topic-x1e80100-4lanes-v1-0-0b1a0d093cd5@linaro.org
For the series:
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
Thanks!
--
With best wishes
Dmitry
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