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Message-ID: <2bc3023e4b6e15b388f8765551018eed@manjaro.org>
Date: Fri, 22 Aug 2025 05:11:15 +0200
From: Dragan Simic <dsimic@...jaro.org>
To: Sebastian Reichel <sebastian.reichel@...labora.com>
Cc: "Rafael J. Wysocki" <rafael@...nel.org>, Daniel Lezcano
<daniel.lezcano@...aro.org>, Zhang Rui <rui.zhang@...el.com>, Lukasz Luba
<lukasz.luba@....com>, Heiko Stuebner <heiko@...ech.de>, Rob Herring
<robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Robin Murphy <robin.murphy@....com>, Diederik de Haas
<didi.debian@...ow.org>, linux-pm@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-rockchip@...ts.infradead.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
kernel@...labora.com
Subject: Re: [PATCH v2 1/3] thermal: rockchip: unify struct
rockchip_tsadc_chip format
Hello Sebastian,
On 2025-08-20 19:40, Sebastian Reichel wrote:
> Unify all chip descriptions to the version without any empty
> lines.
>
> Suggested-by: Heiko Stuebner <heiko@...ech.de>
> Signed-off-by: Sebastian Reichel <sebastian.reichel@...labora.com>
> ---
> drivers/thermal/rockchip_thermal.c | 27 ---------------------------
> 1 file changed, 27 deletions(-)
Thanks for the patch, it's perfectly reasonable and obviously correct.
Please feel free to include
Reviewed-by: Dragan Simic <dsimic@...jaro.org>
> diff --git a/drivers/thermal/rockchip_thermal.c
> b/drivers/thermal/rockchip_thermal.c
> index
> 3beff9b6fac3abe8948b56132b618ff1bed57217..7b18a705dfade6fa7318b28c2b57544a4446c1cc
> 100644
> --- a/drivers/thermal/rockchip_thermal.c
> +++ b/drivers/thermal/rockchip_thermal.c
> @@ -1098,10 +1098,8 @@ static const struct rockchip_tsadc_chip
> px30_tsadc_data = {
> /* cpu, gpu */
> .chn_offset = 0,
> .chn_num = 2, /* 2 channels for tsadc */
> -
> .tshut_mode = TSHUT_MODE_CRU, /* default TSHUT via CRU */
> .tshut_temp = 95000,
> -
> .initialize = rk_tsadcv4_initialize,
> .irq_ack = rk_tsadcv3_irq_ack,
> .control = rk_tsadcv3_control,
> @@ -1109,7 +1107,6 @@ static const struct rockchip_tsadc_chip
> px30_tsadc_data = {
> .set_alarm_temp = rk_tsadcv2_alarm_temp,
> .set_tshut_temp = rk_tsadcv2_tshut_temp,
> .set_tshut_mode = rk_tsadcv2_tshut_mode,
> -
> .table = {
> .id = rk3328_code_table,
> .length = ARRAY_SIZE(rk3328_code_table),
> @@ -1122,11 +1119,9 @@ static const struct rockchip_tsadc_chip
> rv1108_tsadc_data = {
> /* cpu */
> .chn_offset = 0,
> .chn_num = 1, /* one channel for tsadc */
> -
> .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
> .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
> .tshut_temp = 95000,
> -
> .initialize = rk_tsadcv2_initialize,
> .irq_ack = rk_tsadcv3_irq_ack,
> .control = rk_tsadcv3_control,
> @@ -1134,7 +1129,6 @@ static const struct rockchip_tsadc_chip
> rv1108_tsadc_data = {
> .set_alarm_temp = rk_tsadcv2_alarm_temp,
> .set_tshut_temp = rk_tsadcv2_tshut_temp,
> .set_tshut_mode = rk_tsadcv2_tshut_mode,
> -
> .table = {
> .id = rv1108_table,
> .length = ARRAY_SIZE(rv1108_table),
> @@ -1147,11 +1141,9 @@ static const struct rockchip_tsadc_chip
> rk3228_tsadc_data = {
> /* cpu */
> .chn_offset = 0,
> .chn_num = 1, /* one channel for tsadc */
> -
> .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
> .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
> .tshut_temp = 95000,
> -
> .initialize = rk_tsadcv2_initialize,
> .irq_ack = rk_tsadcv3_irq_ack,
> .control = rk_tsadcv3_control,
> @@ -1159,7 +1151,6 @@ static const struct rockchip_tsadc_chip
> rk3228_tsadc_data = {
> .set_alarm_temp = rk_tsadcv2_alarm_temp,
> .set_tshut_temp = rk_tsadcv2_tshut_temp,
> .set_tshut_mode = rk_tsadcv2_tshut_mode,
> -
> .table = {
> .id = rk3228_code_table,
> .length = ARRAY_SIZE(rk3228_code_table),
> @@ -1172,11 +1163,9 @@ static const struct rockchip_tsadc_chip
> rk3288_tsadc_data = {
> /* cpu, gpu */
> .chn_offset = 1,
> .chn_num = 2, /* two channels for tsadc */
> -
> .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
> .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
> .tshut_temp = 95000,
> -
> .initialize = rk_tsadcv2_initialize,
> .irq_ack = rk_tsadcv2_irq_ack,
> .control = rk_tsadcv2_control,
> @@ -1184,7 +1173,6 @@ static const struct rockchip_tsadc_chip
> rk3288_tsadc_data = {
> .set_alarm_temp = rk_tsadcv2_alarm_temp,
> .set_tshut_temp = rk_tsadcv2_tshut_temp,
> .set_tshut_mode = rk_tsadcv2_tshut_mode,
> -
> .table = {
> .id = rk3288_code_table,
> .length = ARRAY_SIZE(rk3288_code_table),
> @@ -1197,10 +1185,8 @@ static const struct rockchip_tsadc_chip
> rk3328_tsadc_data = {
> /* cpu */
> .chn_offset = 0,
> .chn_num = 1, /* one channels for tsadc */
> -
> .tshut_mode = TSHUT_MODE_CRU, /* default TSHUT via CRU */
> .tshut_temp = 95000,
> -
> .initialize = rk_tsadcv2_initialize,
> .irq_ack = rk_tsadcv3_irq_ack,
> .control = rk_tsadcv3_control,
> @@ -1208,7 +1194,6 @@ static const struct rockchip_tsadc_chip
> rk3328_tsadc_data = {
> .set_alarm_temp = rk_tsadcv2_alarm_temp,
> .set_tshut_temp = rk_tsadcv2_tshut_temp,
> .set_tshut_mode = rk_tsadcv2_tshut_mode,
> -
> .table = {
> .id = rk3328_code_table,
> .length = ARRAY_SIZE(rk3328_code_table),
> @@ -1221,11 +1206,9 @@ static const struct rockchip_tsadc_chip
> rk3366_tsadc_data = {
> /* cpu, gpu */
> .chn_offset = 0,
> .chn_num = 2, /* two channels for tsadc */
> -
> .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
> .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
> .tshut_temp = 95000,
> -
> .initialize = rk_tsadcv3_initialize,
> .irq_ack = rk_tsadcv3_irq_ack,
> .control = rk_tsadcv3_control,
> @@ -1233,7 +1216,6 @@ static const struct rockchip_tsadc_chip
> rk3366_tsadc_data = {
> .set_alarm_temp = rk_tsadcv2_alarm_temp,
> .set_tshut_temp = rk_tsadcv2_tshut_temp,
> .set_tshut_mode = rk_tsadcv2_tshut_mode,
> -
> .table = {
> .id = rk3228_code_table,
> .length = ARRAY_SIZE(rk3228_code_table),
> @@ -1246,11 +1228,9 @@ static const struct rockchip_tsadc_chip
> rk3368_tsadc_data = {
> /* cpu, gpu */
> .chn_offset = 0,
> .chn_num = 2, /* two channels for tsadc */
> -
> .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
> .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
> .tshut_temp = 95000,
> -
> .initialize = rk_tsadcv2_initialize,
> .irq_ack = rk_tsadcv2_irq_ack,
> .control = rk_tsadcv2_control,
> @@ -1258,7 +1238,6 @@ static const struct rockchip_tsadc_chip
> rk3368_tsadc_data = {
> .set_alarm_temp = rk_tsadcv2_alarm_temp,
> .set_tshut_temp = rk_tsadcv2_tshut_temp,
> .set_tshut_mode = rk_tsadcv2_tshut_mode,
> -
> .table = {
> .id = rk3368_code_table,
> .length = ARRAY_SIZE(rk3368_code_table),
> @@ -1271,11 +1250,9 @@ static const struct rockchip_tsadc_chip
> rk3399_tsadc_data = {
> /* cpu, gpu */
> .chn_offset = 0,
> .chn_num = 2, /* two channels for tsadc */
> -
> .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
> .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
> .tshut_temp = 95000,
> -
> .initialize = rk_tsadcv3_initialize,
> .irq_ack = rk_tsadcv3_irq_ack,
> .control = rk_tsadcv3_control,
> @@ -1283,7 +1260,6 @@ static const struct rockchip_tsadc_chip
> rk3399_tsadc_data = {
> .set_alarm_temp = rk_tsadcv2_alarm_temp,
> .set_tshut_temp = rk_tsadcv2_tshut_temp,
> .set_tshut_mode = rk_tsadcv2_tshut_mode,
> -
> .table = {
> .id = rk3399_code_table,
> .length = ARRAY_SIZE(rk3399_code_table),
> @@ -1296,11 +1272,9 @@ static const struct rockchip_tsadc_chip
> rk3568_tsadc_data = {
> /* cpu, gpu */
> .chn_offset = 0,
> .chn_num = 2, /* two channels for tsadc */
> -
> .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
> .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
> .tshut_temp = 95000,
> -
> .initialize = rk_tsadcv7_initialize,
> .irq_ack = rk_tsadcv3_irq_ack,
> .control = rk_tsadcv3_control,
> @@ -1308,7 +1282,6 @@ static const struct rockchip_tsadc_chip
> rk3568_tsadc_data = {
> .set_alarm_temp = rk_tsadcv2_alarm_temp,
> .set_tshut_temp = rk_tsadcv2_tshut_temp,
> .set_tshut_mode = rk_tsadcv2_tshut_mode,
> -
> .table = {
> .id = rk3568_code_table,
> .length = ARRAY_SIZE(rk3568_code_table),
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