linux-kernel - Re: [PATCH net-next v4] ptp: add Alibaba CIPU PTP clock driver

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Message-ID: <0086c70c375089245b5abd120f22c0af8b6cf0c2.camel@infradead.org>
Date: Fri, 22 Aug 2025 08:43:02 +0100
From: David Woodhouse <dwmw2@...radead.org>
To: Wen Gu <guwen@...ux.alibaba.com>, Richard Cochran
 <richardcochran@...il.com>,  Jakub Kicinski <kuba@...nel.org>
Cc: andrew+netdev@...n.ch, davem@...emloft.net, edumazet@...gle.com, 
	pabeni@...hat.com, xuanzhuo@...ux.alibaba.com, dust.li@...ux.alibaba.com, 
	netdev@...r.kernel.org, linux-kernel@...r.kernel.org, Thomas Gleixner
	 <tglx@...utronix.de>
Subject: Re: [PATCH net-next v4] ptp: add Alibaba CIPU PTP clock driver

On Fri, 2025-08-22 at 10:07 +0800, Wen Gu wrote:
> 
> Hi David,
> 
> How does vmclock work in a bare‑metal scenario, given that there is no
> guest–hypervisor architecture?
> 
> You mentioned "vmclock over PCI", do you mean passing a PCI device to the
> bare‑metal? What is this PCI device, and which driver does it use?

It would need PCIe PTM to synchronize against the host's arch timer or
TSC, which you said you don't have on the CIPU. We don't have PTM
either, so there is no existing defined PCI device.

I'm in the process of writing up a specification for the vmclock
device. It doesn't really contain much information that isn't already
in the QEMU and Linux code; it'll just be an easier way to find it
rather than reading GPL'd code, which is problematic for some.

I *could* add a PCI transport, but I figured it was easy enough to do
that later if anyone implements one.

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