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Message-Id: <20250822-topic-sm8x50-upstream-pll-multi-pd-voting-dt-v2-5-28f35728a146@linaro.org>
Date: Fri, 22 Aug 2025 11:26:37 +0200
From: Neil Armstrong <neil.armstrong@...aro.org>
To: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Jagadeesh Kona <quic_jkona@...cinc.com>,
Dmitry Baryshkov <lumag@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Neil Armstrong <neil.armstrong@...aro.org>,
Vladimir Zapolskiy <vladimir.zapolskiy@...aro.org>,
Taniya Das <quic_tdas@...cinc.com>,
Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>,
Bryan O'Donoghue <bryan.odonoghue@...aro.org>
Subject: [PATCH v2 5/6] arm64: dts: qcom: sm8550: Additionally manage MXC
power domain in camcc
From: Vladimir Zapolskiy <vladimir.zapolskiy@...aro.org>
Camcc requires both MMCX and MXC rails to be powered ON to configure
the camera PLLs on SM8550 platform. Hence add MXC power domain to
camcc node on SM8550.
Fixes: e271b59e39a6f ("arm64: dts: qcom: sm8550: Add camera clock controller")
Reviewed-by: Taniya Das <quic_tdas@...cinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@...aro.org>
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@...aro.org>
Signed-off-by: Jagadeesh Kona <quic_jkona@...cinc.com>
Signed-off-by: Neil Armstrong <neil.armstrong@...aro.org>
---
arch/arm64/boot/dts/qcom/sm8550.dtsi | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index d4bffcc244c98e87464cb2a4075c21f3cd368482..54ea21e1778a7c104cdf6865f84a7f8b5a8691ca 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -3625,8 +3625,10 @@ camcc: clock-controller@...0000 {
<&bi_tcxo_div2>,
<&bi_tcxo_ao_div2>,
<&sleep_clk>;
- power-domains = <&rpmhpd RPMHPD_MMCX>;
- required-opps = <&rpmhpd_opp_low_svs>;
+ power-domains = <&rpmhpd RPMHPD_MMCX>,
+ <&rpmhpd RPMHPD_MXC>;
+ required-opps = <&rpmhpd_opp_low_svs>,
+ <&rpmhpd_opp_low_svs>;
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
--
2.34.1
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