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Message-Id: <20250822103008.1029-4-jie.gan@oss.qualcomm.com>
Date: Fri, 22 Aug 2025 18:30:08 +0800
From: Jie Gan <jie.gan@....qualcomm.com>
To: Suzuki K Poulose <suzuki.poulose@....com>,
Mike Leach <mike.leach@...aro.org>,
James Clark <james.clark@...aro.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Tingwei Zhang <tingwei.zhang@....qualcomm.com>,
Mao Jinlong <jinlmao.mao@....qualcomm.com>,
Tao Zhang <quic_taozha@...cinc.com>
Cc: linux-arm-msm@...r.kernel.org, coresight@...ts.linaro.org,
linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v1 3/3] arm64: dts: qcom: lemans: enable static TPDM
Enable static TPDM device for lemans.
Signed-off-by: Jie Gan <jie.gan@....qualcomm.com>
---
arch/arm64/boot/dts/qcom/lemans.dtsi | 105 +++++++++++++++++++++++++++
1 file changed, 105 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi
index 64f5378c6a47..077e22b28279 100644
--- a/arch/arm64/boot/dts/qcom/lemans.dtsi
+++ b/arch/arm64/boot/dts/qcom/lemans.dtsi
@@ -2959,6 +2959,14 @@ funnel1_in4: endpoint {
<&apss_funnel1_out>;
};
};
+
+ port@5 {
+ reg = <5>;
+
+ funnel1_in5: endpoint {
+ remote-endpoint = <&dlct0_funnel_out>;
+ };
+ };
};
};
@@ -3116,6 +3124,60 @@ etr1_out: endpoint {
};
};
+ tpda@...3000 {
+ compatible = "qcom,coresight-tpda", "arm,primecell";
+ reg = <0x0 0x4ad3000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@10 {
+ reg = <16>;
+ dlct0_tpda_in16: endpoint {
+ remote-endpoint = <&turing0_funnel_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ dlct0_tpda_out: endpoint {
+ remote-endpoint =
+ <&dlct0_funnel_in0>;
+ };
+ };
+ };
+
+ };
+
+ funnel@...4000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ reg = <0x0 0x4ad4000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ in-ports {
+ port {
+ dlct0_funnel_in0: endpoint {
+ remote-endpoint = <&dlct0_tpda_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ dlct0_funnel_out: endpoint {
+ remote-endpoint = <&funnel1_in5>;
+ };
+ };
+ };
+ };
+
funnel@...4000 {
compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
reg = <0x0 0x4b04000 0x0 0x1000>;
@@ -3388,6 +3450,35 @@ aoss_cti: cti@...3000 {
clock-names = "apb_pclk";
};
+ funnel@...3000 {
+ compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+ reg = <0x0 0x4b83000 0x0 0x1000>;
+
+ clocks = <&aoss_qmp>;
+ clock-names = "apb_pclk";
+
+ in-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@1 {
+ reg = <1>;
+
+ turing0_funnel_in1: endpoint {
+ remote-endpoint = <&turing_llm_tpdm_out>;
+ };
+ };
+ };
+
+ out-ports {
+ port {
+ turing0_funnel_out: endpoint {
+ remote-endpoint = <&dlct0_tpda_in16>;
+ };
+ };
+ };
+ };
+
etm@...0000 {
compatible = "arm,primecell";
reg = <0x0 0x6040000 0x0 0x1000>;
@@ -7578,6 +7669,20 @@ arch_timer: timer {
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
};
+ turing-llm-tpdm {
+ compatible = "qcom,coresight-static-tpdm";
+
+ qcom,cmb-element-bits = <32>;
+
+ out-ports {
+ port {
+ turing_llm_tpdm_out: endpoint {
+ remote-endpoint = <&turing0_funnel_in1>;
+ };
+ };
+ };
+ };
+
pcie0: pcie@...0000 {
compatible = "qcom,pcie-sa8775p";
reg = <0x0 0x01c00000 0x0 0x3000>,
--
2.34.1
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