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Message-Id: <20250822-dts-interrupt-address-cells-v1-5-d54d44b74460@linaro.org>
Date: Fri, 22 Aug 2025 14:04:05 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, cros-qcom-dts-watchers@...omium.org
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: [PATCH 05/15] arm64: dts: qcom: sc8180x: Add default GIC address
cells
Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:
sc8180x.dtsi:1743.4-1746.30: Warning (interrupt_map): /soc@...cie@...0000:interrupt-map:
Missing property '#address-cells' in node /soc@...nterrupt-controller@...00000, using 0 as fallback
Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
the fourth component "parent unit address", which size is defined by
'#address-cells' of the node pointed to by the interrupt-parent
component, is not used (=0).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
---
arch/arm64/boot/dts/qcom/sc8180x.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
index 836ac94551478fd728b1229616bbc6494cee336f..15a75def6204a35d5852e73d66fd3052e38e7863 100644
--- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
@@ -3721,6 +3721,7 @@ remoteproc_adsp_glink: glink-edge {
intc: interrupt-controller@...00000 {
compatible = "arm,gic-v3";
interrupt-controller;
+ #address-cells = <0>;
#interrupt-cells = <3>;
reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */
<0x0 0x17a60000 0x0 0x100000>; /* GICR * 8 */
--
2.48.1
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