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Message-Id: <20250822-dts-interrupt-address-cells-v1-9-d54d44b74460@linaro.org>
Date: Fri, 22 Aug 2025 14:04:09 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, cros-qcom-dts-watchers@...omium.org
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: [PATCH 09/15] arm64: dts: qcom: sm8350: Add default GIC address
cells
Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:
sm8350.dtsi:1554.4-1557.30: Warning (interrupt_map): /soc@...cie@...0000:interrupt-map:
Missing property '#address-cells' in node /soc@...nterrupt-controller@...00000, using 0 as fallback
Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
the fourth component "parent unit address", which size is defined by
'#address-cells' of the node pointed to by the interrupt-parent
component, is not used (=0).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index 9a4207ead6156333b8b6030fb0fbc1d215948041..acaf40298f2e353e81793639522d0b0c52f6179f 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -3544,6 +3544,7 @@ apps_smmu: iommu@...00000 {
intc: interrupt-controller@...00000 {
compatible = "arm,gic-v3";
+ #address-cells = <0>;
#interrupt-cells = <3>;
interrupt-controller;
#redistributor-regions = <1>;
--
2.48.1
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