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Message-ID: <8A7C126C22789C9B+f30def47-302a-45ee-8f76-64ef277f773f@radxa.com>
Date: Sat, 23 Aug 2025 14:22:56 +0800
From: Xilin Wu <sophon@...xa.com>
To: Neil Armstrong <neil.armstrong@...aro.org>,
 Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
Cc: Vinod Koul <vkoul@...nel.org>, Kishon Vijay Abraham I
 <kishon@...nel.org>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Bjorn Andersson <andersson@...nel.org>,
 Konrad Dybcio <konradybcio@...nel.org>, linux-arm-msm@...r.kernel.org,
 linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH RFC 1/3] dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy:
 Document default phy mode

On 2025/8/22 19:02:21, Neil Armstrong wrote:
> On 22/08/2025 12:57, Dmitry Baryshkov wrote:
>> On Thu, Aug 21, 2025 at 03:53:26PM +0200, Neil Armstrong wrote:
>>> The QMP USB3/DP Combo PHY hosts an USB3 phy and a DP PHY on top
>>> of a combo glue to route either lanes to the 4 shared physical lanes.
>>>
>>> The routing of the lanes can be:
>>> - 2 DP + 2 USB3
>>> - 4 DP
>>> - 2 USB3
>>>
>>> And the layout of the lanes can be swpped depending of an
>>> eventual USB-C connector orientation.
>>>
>>> Nevertheless those QMP Comby PHY can be statically used to
>>> drive a DisplayPort connector, DP->HDMI bridge, USB3 A Connector...
>>>
>>> But if a 4lanes DP->HDMI bridge is directly connected to the
>>> QMP Comby PHY lanes, in the default routing 2 or the 4 lanes would
>>> probbaly be USB3, making the DP->HDMI bridge non functional.
>>>
>>> Add a property to hint in which layout mode the QMP Comby PHY
>>> should be as startup.
>>>
>>> Signed-off-by: Neil Armstrong <neil.armstrong@...aro.org>
>>> ---
>>>   .../bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml         | 13 ++ 
>>> +++++++++++
>>>   1 file changed, 13 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp- 
>>> usb43dp-phy.yaml b/Documentation/devicetree/bindings/phy/ 
>>> qcom,sc8280xp-qmp-usb43dp-phy.yaml
>>> index 
>>> c8bc512df08b5694c8599f475de78679a4438449..129475a1d9527733e43ded5a38aad766f9810fe7 100644
>>> --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp- 
>>> usb43dp-phy.yaml
>>> +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp- 
>>> usb43dp-phy.yaml
>>> @@ -76,6 +76,19 @@ properties:
>>>     mode-switch: true
>>>     orientation-switch: true
>>> +  qcom,combo-initial-mode:
>>> +    description:
>>> +      Describe the initial mode of the Combo PHY configuration.
>>> +      The Combo PHY is a wrapper on top of a DP PHY and an USB3 PHY,
>>> +      sharing the same SuperSpeed lanes with either DisplayPort over
>>> +      the 4 lanes (dp), USB3 on a pair of lanes (usb3) or both
>>> +      technologies in a 2+2 configuration (usb3+dp) as default.
>>
>> SPecifying this as an initial mode means that it can be switched later.
>> Should we generalize this and desribe it as bus-type (from
>> video-interfaces.yaml) and allow it to be present only if there is no
>> mode-switch property?
> 
> I was not sure about that, and yes we should do that instead but I'm not
> sure about how.
> 
> bus-type sounds great, but the numbering doesn't match so I was thinking 
> instead
> something like phy-type with a string or use the numbers from include/ 
> dt-bindings/phy/phy.h
> 
> The thing is, do we want to keep the dual dp+usb3 as static ? I think 
> it's very possible
> a board would connect the combo phy to an USB3 A connector and a 2lanes 
> DisplayPort connector.

Yes, our board (Radxa Dragon Q6A) is using such design, but with usb3 
and dp lanes swapped. [1] I think this patch series could be extended to 
handle such configuration.

Currently I just change the default orientation to reverse in 
qmp_combo_probe. [2] It works flawlessly. But of course, it's not an 
upstreamable solution :)

FWIW, Rockchip usbdp phy binding [3] has a property called 
`rockchip,dp-lane-mux` to support such configuration.

[1] 
https://dl.radxa.com/q6a/hw/RADXA%20Dragon%20Q6A%20V1.20%20Schematic%2020250621.pdf

[2] 
https://github.com/strongtz/linux-next/commit/928cd166ce81aca7f8e051c72eccbd84ad896d98

[3] 
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/Documentation/devicetree/bindings/phy/phy-rockchip-usbdp.yaml#n53

> 
> Neil
> 
>>
>>
>>> +    default: usb3+dp
>>> +    enum:
>>> +      - usb3+dp
>>> +      - usb3
>>> +      - dp
>>> +
>>>     ports:
>>>       $ref: /schemas/graph.yaml#/properties/ports
>>>       properties:
>>>
>>> -- 
>>> 2.34.1
>>>
>>
> 


-- 
Best regards,
Xilin Wu <sophon@...xa.com>

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