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Message-ID: <20250823001626.3641935-12-mikhail.kshevetskiy@iopsys.eu>
Date: Sat, 23 Aug 2025 03:16:23 +0300
From: Mikhail Kshevetskiy <mikhail.kshevetskiy@...sys.eu>
To: Lorenzo Bianconi <lorenzo@...nel.org>,
Ray Liu <ray.liu@...oha.com>,
Mark Brown <broonie@...nel.org>,
Jyothi Kumar Seerapu <quic_jseerapu@...cinc.com>,
linux-arm-kernel@...ts.infradead.org,
linux-spi@...r.kernel.org,
linux-kernel@...r.kernel.org
Cc: Mikhail Kshevetskiy <mikhail.kshevetskiy@...sys.eu>
Subject: [PATCH v4 11/13] spi: airoha: set custom sector size equal to flash page size
Set custom sector size equal to flash page size including oob. Thus we
will always read a single sector. The maximum custom sector size is
8187, so all possible flash sector sizes are supported.
This patch is a necessary step to avoid reading flash page settings
from SNFI registers during driver startup.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@...sys.eu>
---
drivers/spi/spi-airoha-snfi.c | 35 +++++++++++++++++++----------------
1 file changed, 19 insertions(+), 16 deletions(-)
diff --git a/drivers/spi/spi-airoha-snfi.c b/drivers/spi/spi-airoha-snfi.c
index 284ec5534693..bcecfb02497f 100644
--- a/drivers/spi/spi-airoha-snfi.c
+++ b/drivers/spi/spi-airoha-snfi.c
@@ -519,7 +519,7 @@ static int airoha_snand_nfi_config(struct airoha_snand_ctrl *as_ctrl)
return err;
/* sec num */
- val = FIELD_PREP(SPI_NFI_SEC_NUM, as_ctrl->nfi_cfg.sec_num);
+ val = FIELD_PREP(SPI_NFI_SEC_NUM, 1);
err = regmap_update_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_CON,
SPI_NFI_SEC_NUM, val);
if (err)
@@ -532,7 +532,8 @@ static int airoha_snand_nfi_config(struct airoha_snand_ctrl *as_ctrl)
return err;
/* set cust sec size */
- val = FIELD_PREP(SPI_NFI_CUS_SEC_SIZE, as_ctrl->nfi_cfg.sec_size);
+ val = FIELD_PREP(SPI_NFI_CUS_SEC_SIZE,
+ as_ctrl->nfi_cfg.sec_size * as_ctrl->nfi_cfg.sec_num);
return regmap_update_bits(as_ctrl->regmap_nfi,
REG_SPI_NFI_SECCUS_SIZE,
SPI_NFI_CUS_SEC_SIZE, val);
@@ -635,10 +636,13 @@ static ssize_t airoha_snand_dirmap_read(struct spi_mem_dirmap_desc *desc,
u8 *txrx_buf = spi_get_ctldata(spi);
dma_addr_t dma_addr;
u32 val, rd_mode, opcode;
+ size_t bytes;
int err;
as_ctrl = spi_controller_get_devdata(spi->controller);
+ bytes = as_ctrl->nfi_cfg.sec_num * as_ctrl->nfi_cfg.sec_size;
+
/*
* DUALIO and QUADIO opcodes are not supported by the spi controller,
* replace them with supported opcodes.
@@ -696,18 +700,17 @@ static ssize_t airoha_snand_dirmap_read(struct spi_mem_dirmap_desc *desc,
FIELD_PREP(SPI_NFI_OPMODE, 6));
/* Set number of sector will be read */
- val = FIELD_PREP(SPI_NFI_SEC_NUM, as_ctrl->nfi_cfg.sec_num);
err = regmap_update_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_CON,
- SPI_NFI_SEC_NUM, val);
+ SPI_NFI_SEC_NUM,
+ FIELD_PREP(SPI_NFI_SEC_NUM, 1));
if (err)
goto error_dma_mode_off;
/* Set custom sector size */
- val = as_ctrl->nfi_cfg.sec_size;
err = regmap_update_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_SECCUS_SIZE,
SPI_NFI_CUS_SEC_SIZE |
SPI_NFI_CUS_SEC_SIZE_EN,
- FIELD_PREP(SPI_NFI_CUS_SEC_SIZE, val) |
+ FIELD_PREP(SPI_NFI_CUS_SEC_SIZE, bytes) |
SPI_NFI_CUS_SEC_SIZE_EN);
if (err)
goto error_dma_mode_off;
@@ -732,11 +735,10 @@ static ssize_t airoha_snand_dirmap_read(struct spi_mem_dirmap_desc *desc,
* = NFI_SNF_MISC_CTL2.read_data_byte_number =
* = NFI_CON.sector_number * NFI_SECCUS.custom_sector_size
*/
- val = as_ctrl->nfi_cfg.sec_size * as_ctrl->nfi_cfg.sec_num;
- val = FIELD_PREP(SPI_NFI_READ_DATA_BYTE_NUM, val);
err = regmap_update_bits(as_ctrl->regmap_nfi,
REG_SPI_NFI_SNF_MISC_CTL2,
- SPI_NFI_READ_DATA_BYTE_NUM, val);
+ SPI_NFI_READ_DATA_BYTE_NUM,
+ FIELD_PREP(SPI_NFI_READ_DATA_BYTE_NUM, bytes));
if (err)
goto error_dma_unmap;
@@ -825,10 +827,13 @@ static ssize_t airoha_snand_dirmap_write(struct spi_mem_dirmap_desc *desc,
struct airoha_snand_ctrl *as_ctrl;
dma_addr_t dma_addr;
u32 wr_mode, val, opcode;
+ size_t bytes;
int err;
as_ctrl = spi_controller_get_devdata(spi->controller);
+ bytes = as_ctrl->nfi_cfg.sec_num * as_ctrl->nfi_cfg.sec_size;
+
opcode = desc->info.op_tmpl.cmd.opcode;
switch (opcode) {
case SPI_NAND_OP_PROGRAM_LOAD_SINGLE:
@@ -879,18 +884,17 @@ static ssize_t airoha_snand_dirmap_write(struct spi_mem_dirmap_desc *desc,
goto error_dma_mode_off;
/* Set number of sector will be written */
- val = FIELD_PREP(SPI_NFI_SEC_NUM, as_ctrl->nfi_cfg.sec_num);
err = regmap_update_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_CON,
- SPI_NFI_SEC_NUM, val);
+ SPI_NFI_SEC_NUM,
+ FIELD_PREP(SPI_NFI_SEC_NUM, 1));
if (err)
goto error_dma_mode_off;
/* Set custom sector size */
- val = as_ctrl->nfi_cfg.sec_size;
err = regmap_update_bits(as_ctrl->regmap_nfi, REG_SPI_NFI_SECCUS_SIZE,
SPI_NFI_CUS_SEC_SIZE |
SPI_NFI_CUS_SEC_SIZE_EN,
- FIELD_PREP(SPI_NFI_CUS_SEC_SIZE, val) |
+ FIELD_PREP(SPI_NFI_CUS_SEC_SIZE, bytes) |
SPI_NFI_CUS_SEC_SIZE_EN);
if (err)
goto error_dma_mode_off;
@@ -915,11 +919,10 @@ static ssize_t airoha_snand_dirmap_write(struct spi_mem_dirmap_desc *desc,
* = NFI_SNF_MISC_CTL2.write_data_byte_number =
* = NFI_CON.sector_number * NFI_SECCUS.custom_sector_size
*/
- val = as_ctrl->nfi_cfg.sec_size * as_ctrl->nfi_cfg.sec_num;
- val = FIELD_PREP(SPI_NFI_PROG_LOAD_BYTE_NUM, val);
err = regmap_update_bits(as_ctrl->regmap_nfi,
REG_SPI_NFI_SNF_MISC_CTL2,
- SPI_NFI_PROG_LOAD_BYTE_NUM, val);
+ SPI_NFI_PROG_LOAD_BYTE_NUM,
+ FIELD_PREP(SPI_NFI_PROG_LOAD_BYTE_NUM, bytes));
if (err)
goto error_dma_unmap;
--
2.50.1
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