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Message-ID: <a57a9878-893c-41ab-8380-a0ac9e736752@gmail.com>
Date: Sun, 24 Aug 2025 18:39:05 -0400
From: Demi Marie Obenour <demiobenour@...il.com>
To: Xiaoyao Li <xiaoyao.li@...el.com>, Sohil Mehta <sohil.mehta@...el.com>,
David Woodhouse <dwmw2@...radead.org>, x86@...nel.org,
Dave Hansen <dave.hansen@...ux.intel.com>, Tony Luck <tony.luck@...el.com>,
Jürgen Gross <jgross@...e.com>,
Boris Ostrovsky <boris.ostrovsky@...cle.com>,
xen-devel <xen-devel@...ts.xenproject.org>
Cc: Peter Zijlstra <peterz@...radead.org>, Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
Namhyung Kim <namhyung@...nel.org>, Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...nel.org>, Ian Rogers <irogers@...gle.com>,
Adrian Hunter <adrian.hunter@...el.com>,
Kan Liang <kan.liang@...ux.intel.com>, Thomas Gleixner <tglx@...utronix.de>,
Borislav Petkov <bp@...en8.de>, "H . Peter Anvin" <hpa@...or.com>,
"Rafael J . Wysocki" <rafael@...nel.org>, Len Brown <lenb@...nel.org>,
Andy Lutomirski <luto@...nel.org>, Viresh Kumar <viresh.kumar@...aro.org>,
Jean Delvare <jdelvare@...e.com>, Guenter Roeck <linux@...ck-us.net>,
Zhang Rui <rui.zhang@...el.com>, Andrew Cooper <andrew.cooper3@...rix.com>,
David Laight <david.laight.linux@...il.com>,
Dapeng Mi <dapeng1.mi@...ux.intel.com>, linux-perf-users@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-acpi@...r.kernel.org,
linux-pm@...r.kernel.org, kvm@...r.kernel.org, Xin Li <xin@...or.com>
Subject: Re: [PATCH v3 13/15] x86/cpu/intel: Bound the non-architectural
constant_tsc model checks
On 8/21/25 21:46, Xiaoyao Li wrote:
> On 8/22/2025 3:43 AM, Sohil Mehta wrote:
>> On 8/21/2025 12:34 PM, Sohil Mehta wrote:
>>> On 8/21/2025 6:15 AM, David Woodhouse wrote:
>>>
>>>> Hm. My test host is INTEL_HASWELL_X (0x63f). For reasons which are
>>>> unclear to me, QEMU doesn't set bit 8 of 0x80000007 EDX unless I
>>>> explicitly append ',+invtsc' to the existing '-cpu host' on its command
>>>> line. So now my guest doesn't think it has X86_FEATURE_CONSTANT_TSC.
>>>>
>>>
>>> Haswell should have X86_FEATURE_CONSTANT_TSC, so I would have expected
>>> the guest bit to be set. Until now, X86_FEATURE_CONSTANT_TSC was set
>>> based on the Family-model instead of the CPUID enumeration which may
>>> have hid the issue.
>>>
>>
>> Correction:
>> s/instead/as well as
>>
>>> From my initial look at the QEMU implementation, this seems intentional.
>>>
>>> QEMU considers Invariant TSC as un-migratable which prevents it from
>>> being exposed to migratable guests (default).
>>> target/i386/cpu.c:
>>> [FEAT_8000_0007_EDX]
>>> .unmigratable_flags = CPUID_APM_INVTSC,
>>>
>>> Can you please try '-cpu host,migratable=off'?
>>
>> This is mainly to verify. If confirmed, I am not sure what the long term
>> solution should be.
>
> yeah. It's the intentional behavior of QEMU.
>
> Invariant TSC is ummigratable unless users explicitly configures the TSC
> frequency, e.g., "-cpu host,tsc-frequency=xxx". Because the TSC
> frequency is by default the host's frequency if no "tsc-frequency"
> specified, and it will change when the VM is migrated to a host with a
> different TSC frequency.
>
> It's the specific behavior/rule of QEMU. We just need to keep it in
> mind. If we want to expose invariant TSC to the guest with QEMU's "-cpu
> host", we can either:
> 1) explicitly configure the "tsc-frequency", or
> 2) explicitly turn off "migratable"
Could the TSC frequency be included in the migration stream?
--
Sincerely,
Demi Marie Obenour (she/her/hers)
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