lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <edbdcd7c-8c96-4cbd-9740-1e1044fba3b0@ti.com>
Date: Mon, 25 Aug 2025 09:18:49 -0500
From: Andrew Davis <afd@...com>
To: Beleswar Padhi <b-padhi@...com>, <nm@...com>, <vigneshr@...com>,
        <kristo@...nel.org>, <robh@...nel.org>, <krzk+dt@...nel.org>,
        <conor+dt@...nel.org>
CC: <u-kumar1@...com>, <hnagalla@...com>, <jm@...com>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v2 01/33] arm64: dts: ti: k3-j7200: Enable remote
 processors at board level

On 8/23/25 11:08 AM, Beleswar Padhi wrote:
> Remote Processors defined in top-level J7200 SoC dtsi files are
> incomplete without the memory carveouts and mailbox assignments which
> are only known at board integration level.
> 
> Therefore, disable the remote processors at SoC level and enable them at
> board level where above information is available.
> 
> Signed-off-by: Beleswar Padhi <b-padhi@...com>
> ---

Small comment on the $subject, these all seem to be specific to the R5F
cores, the other remote processors are already enabled at the board level.
Suggest: "Enable R5F remote processors at board level"

Otherwise this looks good to me, same for patches 2-12 in this series
so feel free to add my ACK to those 12 patches when you spin v3,

Acked-by: Andrew Davis <afd@...com>

> v2: Changelog:
> 1. None
> 
> Link to v1:
> https://lore.kernel.org/all/20250814223839.3256046-2-b-padhi@ti.com/
> 
>   arch/arm64/boot/dts/ti/k3-j7200-main.dtsi       | 3 +++
>   arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 3 +++
>   arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi     | 9 +++++++++
>   3 files changed, 15 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> index 5ce5f0a3d6f5..628ff89dd72f 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> @@ -1516,6 +1516,7 @@ main_r5fss0: r5fss@...0000 {
>   		ranges = <0x5c00000 0x00 0x5c00000 0x20000>,
>   			 <0x5d00000 0x00 0x5d00000 0x20000>;
>   		power-domains = <&k3_pds 243 TI_SCI_PD_EXCLUSIVE>;
> +		status = "disabled";
>   
>   		main_r5fss0_core0: r5f@...0000 {
>   			compatible = "ti,j7200-r5f";
> @@ -1530,6 +1531,7 @@ main_r5fss0_core0: r5f@...0000 {
>   			ti,atcm-enable = <1>;
>   			ti,btcm-enable = <1>;
>   			ti,loczrama = <1>;
> +			status = "disabled";
>   		};
>   
>   		main_r5fss0_core1: r5f@...0000 {
> @@ -1545,6 +1547,7 @@ main_r5fss0_core1: r5f@...0000 {
>   			ti,atcm-enable = <1>;
>   			ti,btcm-enable = <1>;
>   			ti,loczrama = <1>;
> +			status = "disabled";
>   		};
>   	};
>   
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> index 56ab144fea07..692c4745040e 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> @@ -612,6 +612,7 @@ mcu_r5fss0: r5fss@...00000 {
>   		ranges = <0x41000000 0x00 0x41000000 0x20000>,
>   			 <0x41400000 0x00 0x41400000 0x20000>;
>   		power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>;
> +		status = "disabled";
>   
>   		mcu_r5fss0_core0: r5f@...00000 {
>   			compatible = "ti,j7200-r5f";
> @@ -626,6 +627,7 @@ mcu_r5fss0_core0: r5f@...00000 {
>   			ti,atcm-enable = <1>;
>   			ti,btcm-enable = <1>;
>   			ti,loczrama = <1>;
> +			status = "disabled";
>   		};
>   
>   		mcu_r5fss0_core1: r5f@...00000 {
> @@ -641,6 +643,7 @@ mcu_r5fss0_core1: r5f@...00000 {
>   			ti,atcm-enable = <1>;
>   			ti,btcm-enable = <1>;
>   			ti,loczrama = <1>;
> +			status = "disabled";
>   		};
>   	};
>   
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
> index 291ab9bb414d..90befcdc8d08 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
> @@ -254,20 +254,27 @@ mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
>   	};
>   };
>   
> +&mcu_r5fss0 {
> +	status = "okay";
> +};
> +
>   &mcu_r5fss0_core0 {
>   	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
>   	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
>   			<&mcu_r5fss0_core0_memory_region>;
> +	status = "okay";
>   };
>   
>   &mcu_r5fss0_core1 {
>   	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
>   	memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
>   			<&mcu_r5fss0_core1_memory_region>;
> +	status = "okay";
>   };
>   
>   &main_r5fss0 {
>   	ti,cluster-mode = <0>;
> +	status = "okay";
>   };
>   
>   /* Timers are used by Remoteproc firmware */
> @@ -287,12 +294,14 @@ &main_r5fss0_core0 {
>   	mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
>   	memory-region = <&main_r5fss0_core0_dma_memory_region>,
>   			<&main_r5fss0_core0_memory_region>;
> +	status = "okay";
>   };
>   
>   &main_r5fss0_core1 {
>   	mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
>   	memory-region = <&main_r5fss0_core1_dma_memory_region>,
>   			<&main_r5fss0_core1_memory_region>;
> +	status = "okay";
>   };
>   
>   &main_i2c0 {


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ