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Message-ID: <20250825152042.GAaKx_SlTqYRBywwZl@fat_crate.local>
Date: Mon, 25 Aug 2025 17:20:42 +0200
From: Borislav Petkov <bp@...en8.de>
To: Neeraj Upadhyay <Neeraj.Upadhyay@....com>
Cc: linux-kernel@...r.kernel.org, tglx@...utronix.de, mingo@...hat.com,
dave.hansen@...ux.intel.com, Thomas.Lendacky@....com,
nikunj@....com, Santosh.Shukla@....com, Vasant.Hegde@....com,
Suravee.Suthikulpanit@....com, David.Kaplan@....com, x86@...nel.org,
hpa@...or.com, peterz@...radead.org, seanjc@...gle.com,
pbonzini@...hat.com, kvm@...r.kernel.org, huibo.wang@....com,
naveen.rao@....com, francescolavra.fl@...il.com,
tiala@...rosoft.com
Subject: Re: [PATCH v9 11/18] x86/apic: Allow NMI to be injected from
hypervisor for Secure AVIC
On Mon, Aug 11, 2025 at 03:14:37PM +0530, Neeraj Upadhyay wrote:
> Secure AVIC requires "AllowedNmi" bit in the Secure AVIC Control MSR
> to be set for NMI to be injected from hypervisor.
"So set it."
And drop that sentence repeating the whole thing again.
> Set "AllowedNmi"
> bit in Secure AVIC Control MSR to allow NMI interrupts to be injected
> from hypervisor.
> diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
> index 2a6d4fd8659a..2efc03d324c0 100644
> --- a/arch/x86/include/asm/msr-index.h
> +++ b/arch/x86/include/asm/msr-index.h
> @@ -703,6 +703,9 @@
> #define MSR_AMD64_SNP_SECURE_AVIC BIT_ULL(MSR_AMD64_SNP_SECURE_AVIC_BIT)
> #define MSR_AMD64_SNP_RESV_BIT 19
> #define MSR_AMD64_SNP_RESERVED_MASK GENMASK_ULL(63, MSR_AMD64_SNP_RESV_BIT)
> +#define MSR_AMD64_SECURE_AVIC_CONTROL 0xc0010138
> +#define MSR_AMD64_SECURE_AVIC_ALLOWEDNMI_BIT 1
> +#define MSR_AMD64_SECURE_AVIC_ALLOWEDNMI BIT_ULL(MSR_AMD64_SECURE_AVIC_ALLOWEDNMI_BIT)
> #define MSR_AMD64_RMP_BASE 0xc0010132
> #define MSR_AMD64_RMP_END 0xc0010133
> #define MSR_AMD64_RMP_CFG 0xc0010136
s/_SECURE_AVIC_/_SAVIC_/g
and you'll have room again.
> diff --git a/arch/x86/kernel/apic/x2apic_savic.c b/arch/x86/kernel/apic/x2apic_savic.c
> index 62681fa4f1a5..2bae2f711959 100644
> --- a/arch/x86/kernel/apic/x2apic_savic.c
> +++ b/arch/x86/kernel/apic/x2apic_savic.c
> @@ -23,6 +23,11 @@ struct secure_avic_page {
>
> static struct secure_avic_page __percpu *secure_avic_page __ro_after_init;
>
> +static inline void savic_wr_control_msr(u64 val)
> +{
> + native_wrmsr(MSR_AMD64_SECURE_AVIC_CONTROL, lower_32_bits(val), upper_32_bits(val));
> +}
Zap that silly wrapper.
Thx.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
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