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Message-ID: <20250825064929.188101-4-shin.son@samsung.com>
Date: Mon, 25 Aug 2025 15:49:29 +0900
From: Shin Son <shin.son@...sung.com>
To: Bartlomiej Zolnierkiewicz <bzolnier@...il.com>, Krzysztof Kozlowski
<krzk@...nel.org>, "Rafael J . Wysocki" <rafael@...nel.org>, Daniel Lezcano
<daniel.lezcano@...aro.org>, Zhang Rui <rui.zhang@...el.com>, Lukasz Luba
<lukasz.luba@....com>, Rob Herring <robh@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Alim Akhtar <alim.akhtar@...sung.com>
Cc: Shin Son <shin.son@...sung.com>, linux-pm@...r.kernel.org,
linux-samsung-soc@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [PATCH 3/3] arm64: dts: exynosautov920: Add tmu hardware binding
Create a new exynosautov920-tmu.dtsi describing new TMU hardware
and include it from exynosautov920.dtsi.
The exynosautov920-tmu node uses the misc clock as its source
and exposes two new DT properties:
- tmu-name: identifies the TMU variant for sensor skipping
- sensor-index-ranges: defines valid sensor index ranges for the bitmap
This TMU binding defines six thermal zones with a critical trip point
at 125 degrees:
tmu_top : cpucl0-left, cpucl1
tmu_sub0: cpucl0-right, cpucl2
tmu_sub1: g3d, npu
Signed-off-by: Shin Son <shin.son@...sung.com>
---
.../boot/dts/exynos/exynosautov920-tmu.dtsi | 92 +++++++++++++++++++
.../arm64/boot/dts/exynos/exynosautov920.dtsi | 34 +++++++
2 files changed, 126 insertions(+)
create mode 100644 arch/arm64/boot/dts/exynos/exynosautov920-tmu.dtsi
diff --git a/arch/arm64/boot/dts/exynos/exynosautov920-tmu.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920-tmu.dtsi
new file mode 100644
index 000000000000..fa88e9bcdfec
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynosautov920-tmu.dtsi
@@ -0,0 +1,92 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Samsung's ExynosAuto920 TMU configurations device tree source
+ *
+ * Copyright (c) 2020 Samsung Electronics Co., Ltd.
+ *
+ * Samsung's ExynosAuto920 SoC TMU(Thermal Managemenut Unit) are listed as
+ * device tree nodes in this file.
+ */
+
+/ {
+ thermal-zones {
+ cpucl0left-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tmuctrl_top 0>;
+
+ trips {
+ cpucl0_0_critical: cpucl0-0-critical {
+ temperature = <125000>; /* millicelsius */
+ hysteresis = <0>; /* millicelsius */
+ type = "critical";
+ };
+ };
+ };
+ cpucl0right-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tmuctrl_sub0 0>;
+
+ trips {
+ cpucl0_1_critical: cpucl0-1-critical {
+ temperature = <125000>; /* millicelsius */
+ hysteresis = <0>; /* millicelsius */
+ type = "critical";
+ };
+ };
+ };
+ cpucl1-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tmuctrl_top 1>;
+
+ trips {
+ cpucl1_critical: cpucl1-critical {
+ temperature = <125000>; /* millicelsius */
+ hysteresis = <0>; /* millicelsius */
+ type = "critical";
+ };
+ };
+ };
+ cpucl2-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tmuctrl_sub0 1>;
+
+ trips {
+ cpucl2_critical: cpucl2-critical {
+ temperature = <125000>; /* millicelsius */
+ hysteresis = <0>; /* millicelsius */
+ type = "critical";
+ };
+ };
+ };
+ g3d-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tmuctrl_sub1 0>;
+
+ trips {
+ g3d_critical: g3d-critical {
+ temperature = <125000>; /* millicelsius */
+ hysteresis = <0>; /* millicelsius */
+ type = "critical";
+ };
+ };
+ };
+ npu-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tmuctrl_sub1 1>;
+
+ trips {
+ npu_critical: npu-critical {
+ temperature = <125000>; /* millicelsius */
+ hysteresis = <0>; /* millicelsius */
+ type = "critical";
+ };
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
index 0fdf2062930a..a4ff941f8e43 100644
--- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
@@ -330,6 +330,39 @@ watchdog_cl1: watchdog@...70000 {
samsung,cluster-index = <1>;
};
+ tmuctrl_top: tmutop-thermal@...a0000 {
+ compatible = "samsung,exynosautov920-tmu";
+ reg = <0x100A0000 0x1000>;
+ interrupts = <GIC_SPI 951 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cmu_misc CLK_DOUT_MISC_NOCP>;
+ clock-names = "tmu_apbif";
+ #thermal-sensor-cells = <1>;
+ tmu-name = "TMU_TOP";
+ sensor-index-ranges = <1 12>;
+ };
+
+ tmuctrl_sub0: tmusub0-thermal@...b0000 {
+ compatible = "samsung,exynosautov920-tmu";
+ reg = <0x100B0000 0x1000>;
+ interrupts = <GIC_SPI 950 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cmu_misc CLK_DOUT_MISC_NOCP>;
+ clock-names = "tmu_apbif";
+ #thermal-sensor-cells = <1>;
+ tmu-name = "TMU_SUB0";
+ sensor-index-ranges = <3 10>;
+ };
+
+ tmuctrl_sub1: tmusub1-thermal@...c0000 {
+ compatible = "samsung,exynosautov920-tmu";
+ reg = <0x100C0000 0x1000>;
+ interrupts = <GIC_SPI 949 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cmu_misc CLK_DOUT_MISC_NOCP>;
+ clock-names = "tmu_apbif";
+ #thermal-sensor-cells = <1>;
+ tmu-name = "TMU_SUB1";
+ sensor-index-ranges = <1 7>;
+ };
+
gic: interrupt-controller@...00000 {
compatible = "arm,gic-v3";
#interrupt-cells = <3>;
@@ -1507,3 +1540,4 @@ timer {
};
#include "exynosautov920-pinctrl.dtsi"
+#include "exynosautov920-tmu.dtsi"
--
2.50.1
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