linux-kernel - Re: [PATCH v1 2/2] PCI: dwc: histb: Simplify reset control handling by using reset_control

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Message-ID: <CANAwSgQrtgL3k7gMvDmuJ-JHCozhJ_cHDXmKoA6oXVAuoaiM5Q@mail.gmail.com>
Date: Tue, 26 Aug 2025 21:27:08 +0530
From: Anand Moon <linux.amoon@...il.com>
To: Philipp Zabel <p.zabel@...gutronix.de>
Cc: Shawn Guo <shawn.guo@...aro.org>, Lorenzo Pieralisi <lpieralisi@...nel.org>, 
	Krzysztof Wilczyński <kwilczynski@...nel.org>, 
	Manivannan Sadhasivam <mani@...nel.org>, Rob Herring <robh@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>, 
	"open list:PCIE DRIVER FOR HISILICON STB" <linux-pci@...r.kernel.org>, open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v1 2/2] PCI: dwc: histb: Simplify reset control handling
 by using reset_control_bulk*() function

Hi Philipp,

Thanks for your review comments.
On Tue, 26 Aug 2025 at 18:16, Philipp Zabel <p.zabel@...gutronix.de> wrote:
>
> On Di, 2025-08-26 at 17:12 +0530, Anand Moon wrote:
> > Currently, the driver acquires and asserts/deasserts the resets
> > individually thereby making the driver complex to read.
> >
> > This can be simplified by using the reset_control_bulk() APIs.
> >
> > Use devm_reset_control_bulk_get_exclusive() API to acquire all the resets
> > and use reset_control_bulk_{assert/deassert}() APIs to assert/deassert them
> > in bulk.
> >
> > Signed-off-by: Anand Moon <linux.amoon@...il.com>
> > ---
> >  drivers/pci/controller/dwc/pcie-histb.c | 57 ++++++++++++-------------
> >  1 file changed, 28 insertions(+), 29 deletions(-)
> >
> > diff --git a/drivers/pci/controller/dwc/pcie-histb.c b/drivers/pci/controller/dwc/pcie-histb.c
> > index 4022349e85d2..4ba5c9af63a0 100644
> > --- a/drivers/pci/controller/dwc/pcie-histb.c
> > +++ b/drivers/pci/controller/dwc/pcie-histb.c
> > @@ -49,14 +49,20 @@
> >  #define PCIE_LTSSM_STATE_MASK                GENMASK(5, 0)
> >  #define PCIE_LTSSM_STATE_ACTIVE              0x11
> >
> > +#define PCIE_HISTB_NUM_RESETS   ARRAY_SIZE(histb_pci_rsts)
> > +
> > +static const char * const histb_pci_rsts[] = {
> > +     "soft",
> > +     "sys",
> > +     "bus",
> > +};
> > +
> [...]
> > @@ -236,14 +241,19 @@ static int histb_pcie_host_enable(struct dw_pcie_rp *pp)
> >               goto reg_dis;
> >       }
> >
> > -     reset_control_assert(hipcie->soft_reset);
> > -     reset_control_deassert(hipcie->soft_reset);
> > -
> > -     reset_control_assert(hipcie->sys_reset);
> > -     reset_control_deassert(hipcie->sys_reset);
> > +     ret = reset_control_bulk_assert(PCIE_HISTB_NUM_RESETS,
> > +                                     hipcie->reset);
> > +     if (ret) {
> > +             dev_err(dev, "Couldn't assert reset %d\n", ret);
> > +             goto reg_dis;
> > +     }
> >
> > -     reset_control_assert(hipcie->bus_reset);
> > -     reset_control_deassert(hipcie->bus_reset);
> > +     ret = reset_control_bulk_deassert(PCIE_HISTB_NUM_RESETS,
>
> Note that this changes the order of assertion/deassertion, not only
> because resets lines are now switched in bulk, but also because
> reset_control_bulk_deassert() deasserts the reset lines in reverse
> order. So this does
>
> If the three resets are independent and order doesn't matter,
>
I followed the expected reset flow as part of the initialization probe process.
> Reviewed-by: Philipp Zabel <p.zabel@...gutronix.de>
>
> regards
> Philipp
Thanks
-Anand