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Message-ID: <20250826190640.GA851938@bhelgaas>
Date: Tue, 26 Aug 2025 14:06:40 -0500
From: Bjorn Helgaas <helgaas@...nel.org>
To: Anand Moon <linux.amoon@...il.com>, Shawn Guo <shawn.guo@...aro.org>
Cc: Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof WilczyĆski <kwilczynski@...nel.org>,
Manivannan Sadhasivam <mani@...nel.org>,
Rob Herring <robh@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
"open list:PCIE DRIVER FOR HISILICON STB" <linux-pci@...r.kernel.org>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v1 2/2] PCI: dwc: histb: Simplify reset control handling
by using reset_control_bulk*() function
[cc->to: Shawn]
On Tue, Aug 26, 2025 at 11:33:17PM +0530, Anand Moon wrote:
> On Tue, 26 Aug 2025 at 21:55, Bjorn Helgaas <helgaas@...nel.org> wrote:
> > On Tue, Aug 26, 2025 at 05:12:41PM +0530, Anand Moon wrote:
> > > Currently, the driver acquires and asserts/deasserts the resets
> > > individually thereby making the driver complex to read.
> > >
> > > This can be simplified by using the reset_control_bulk() APIs.
> > >
> > > Use devm_reset_control_bulk_get_exclusive() API to acquire all the resets
> > > and use reset_control_bulk_{assert/deassert}() APIs to assert/deassert them
> > > in bulk.
> >
> > Please include a note that this changes the order of reset assert and
> > deassert and explain why this is safe.
> >
> I feel the device tree follows the same order as defined in the array.
>
> resets = <&crg 0x18c 6>, <&crg 0x18c 5>, <&crg 0x18c 4>;
> reset-names = "soft", "sys", "bus";
>
> Ok I will update this in the commit message.
Following the device tree order doesn't necessarily mean that this is
safe. We know the current order in the code works. We don't know
that a different order works until that's tested and verified.
These will both need acks from Shawn (pcie-histb.c maintainer).
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