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Message-ID: <p6yacm6hkhp4rgtl2xn677kek24ksczvtuersxnou4kmxmp7go@tmoy7gn4hrhx>
Date: Tue, 26 Aug 2025 14:56:03 +0530
From: Manivannan Sadhasivam <mani@...nel.org>
To: Krzysztof Kozlowski <krzk@...nel.org>
Cc: Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>,
Vinod Koul <vkoul@...nel.org>, Kishon Vijay Abraham I <kishon@...nel.org>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof Wilczyński <kwilczynski@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>,
Bjorn Andersson <andersson@...nel.org>, Konrad Dybcio <konradybcio@...nel.org>,
linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org, quic_vbadigan@...cinc.com,
quic_mrana@...cinc.com
Subject: Re: [PATCH v2 3/3] PCI: qcom: Restrict port parsing only to pci
child nodes
On Tue, Aug 26, 2025 at 10:28:51AM GMT, Krzysztof Kozlowski wrote:
> On 26/08/2025 08:17, Manivannan Sadhasivam wrote:
> > On Tue, Aug 26, 2025 at 10:48:19AM GMT, Krishna Chaitanya Chundru wrote:
> >> The qcom_pcie_parse_ports() function currently iterates over all available
> >> child nodes of the PCIe controller's device tree node. This can lead to
> >> attempts to parse unrelated nodes like OPP nodes, resulting in unnecessary
> >> errors or misconfiguration.
> >>
> >
> > What errors? Errors you are seeing on your setup or you envision?
> >
> >> Restrict the parsing logic to only consider child nodes named "pcie" or
> >> "pci", which are the expected node names for PCIe ports.
> >>
> >> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>
> >
> > Since this is a fix, 'Fixes' tag is needed.
> >
> >> ---
> >> drivers/pci/controller/dwc/pcie-qcom.c | 2 ++
> >> 1 file changed, 2 insertions(+)
> >>
> >> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> >> index 294babe1816e4d0c2b2343fe22d89af72afcd6cd..5dbdb69fbdd1b9b78a3ebba3cd50d78168f2d595 100644
> >> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> >> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> >> @@ -1740,6 +1740,8 @@ static int qcom_pcie_parse_ports(struct qcom_pcie *pcie)
> >> int ret = -ENOENT;
> >>
> >> for_each_available_child_of_node_scoped(dev->of_node, of_port) {
> >> + if (!(of_node_name_eq(of_port, "pcie") || of_node_name_eq(of_port, "pci")))
> >
> > May I know which platform has 'pci' as the node name for the bridge node? AFAIK,
> > all platforms defining bridge nodes have 'pcie' as the node name.
>
> It does not matter. If I name my node name as "pc" it stops working?
>
> No, Qualcomm cannot introduce such hidden ABI.
There is no hidden ABI that Qcom is introducing. We are just trying to reuse the
standard node names documented in the devicetree spec. So you are saying that
we should not rely on it even though it is documented? Maybe because, the dt
tooling is not yet screaming if people put non-standard names in DT?
- Mani
--
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