lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <992fcb80-1a54-4d57-a764-d6ba77cb11e9@ti.com>
Date: Wed, 27 Aug 2025 08:31:33 -0500
From: Andrew Davis <afd@...com>
To: Michael Walle <mwalle@...nel.org>, Nishanth Menon <nm@...com>,
        Vignesh
 Raghavendra <vigneshr@...com>,
        Tero Kristo <kristo@...nel.org>, Rob Herring
	<robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley
	<conor+dt@...nel.org>, Jean Delvare <jdelvare@...e.com>,
        Guenter Roeck
	<linux@...ck-us.net>, Lee Jones <lee@...nel.org>,
        Srinivas Kandagatla
	<srini@...nel.org>,
        Wim Van Sebroeck <wim@...ux-watchdog.org>
CC: <linux-arm-kernel@...ts.infradead.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <linux-hwmon@...r.kernel.org>,
        <linux-watchdog@...r.kernel.org>
Subject: Re: [PATCH v1 7/7] arm64: dts: ti: Add support for Kontron
 SMARC-sAM67

On 8/22/25 8:15 AM, Michael Walle wrote:
> The Kontron SMARC-sAM67 is a SMARC module which features a TI AM67 SoC.
> It supports the following features:
>   * Quad-core AM67A94 with 1.4GHz
>   * 8 GiB RAM
>   * 64 GiB eMMC
>   * 4 MiB SPI flash for failsafe booting
>   * 4x UART
>   * 1x USB 2.0
>   * 1x USB 3.2 (or 4x USB3.2 with onboard USB 3.2 hub)
>   * 1x RTC
>   * 2x GBE
>   * 1x QSPI (with 2 chip selects)
>   * 1x SPI (with 2 chip selects)
>   * 7x I2C
>   * 4x CSI (*)
>   * 2x LVDS (or one dual-link LVDS)
>   * 1x DSI (*)
>   * 1x DP (*)
>   * onboard microcontroller for boot control, failsafe booting and
>     external watchdog
> 
> (*) not yet supported by the kernel
> 
> There is a base device tree and overlays which will add optional
> features. At the moment there is one full featured variant of that
> board whose device tree is generated during build by merging all the
> device tree overlays.
> 
> Signed-off-by: Michael Walle <mwalle@...nel.org>
> ---
>   arch/arm64/boot/dts/ti/Makefile               |    6 +
>   .../dts/ti/k3-am67a-kontron-sa67-base.dts     | 1092 +++++++++++++++++
>   .../dts/ti/k3-am67a-kontron-sa67-gbe1.dtso    |   19 +
>   .../ti/k3-am67a-kontron-sa67-rtc-rv8263.dtso  |   24 +
>   4 files changed, 1141 insertions(+)
>   create mode 100644 arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-base.dts
>   create mode 100644 arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-gbe1.dtso
>   create mode 100644 arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-rtc-rv8263.dtso
> 
> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile

[...]

> diff --git a/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-gbe1.dtso b/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-gbe1.dtso
> new file mode 100644
> index 000000000000..4e9eb7998f38
> --- /dev/null
> +++ b/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-gbe1.dtso
> @@ -0,0 +1,19 @@

DTSO files should have copyright and license here same as DTS.

Andrew

> +/dts-v1/;
> +/plugin/;
> +
> +&cpsw3g_mdio {
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +
> +	phy1: ethernet-phy@1 {
> +		reg = <1>;
> +	};
> +};
> +
> +&cpsw_port2 {
> +	phy-connection-type = "rgmii-id";
> +	phy-handle = <&phy1>;
> +	nvmem-cells = <&base_mac_address 1>;
> +	nvmem-cell-names = "mac-address";
> +	status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-rtc-rv8263.dtso b/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-rtc-rv8263.dtso
> new file mode 100644
> index 000000000000..c9aa15269c92
> --- /dev/null
> +++ b/arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-rtc-rv8263.dtso
> @@ -0,0 +1,24 @@
> +/dts-v1/;
> +/plugin/;
> +
> +#include <dt-bindings/interrupt-controller/irq.h>
> +
> +&{/} {
> +	aliases {
> +		rtc0 = "/bus@...00/i2c@...00000/rtc@51"; /* &rtc */
> +		rtc1 = "/bus@...00/bus@...000/rtc@...f0000"; /* &wkup_rtc0 */
> +	};
> +};
> +
> +&main_i2c0 {
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +
> +	rtc: rtc@51 {
> +		compatible = "microcrystal,rv8263";
> +		reg = <0x51>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&rtc_pins_default>;
> +		interrupts-extended = <&main_gpio0 36 IRQ_TYPE_EDGE_FALLING>;
> +	};
> +};


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ