linux-kernel - Re: [PATCH v2] iommu/amd: Add support for hw

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Message-ID: <aK8opOZJGg7PI9Vb@Asurada-Nvidia>
Date: Wed, 27 Aug 2025 08:47:48 -0700
From: Nicolin Chen <nicolinc@...dia.com>
To: Suravee Suthikulpanit <suravee.suthikulpanit@....com>
CC: <jgg@...dia.com>, <linux-kernel@...r.kernel.org>, <robin.murphy@....com>,
	<will@...nel.org>, <joro@...tes.org>, <kevin.tian@...el.com>,
	<jsnitsel@...hat.com>, <vasant.hegde@....com>, <iommu@...ts.linux.dev>,
	<santosh.shukla@....com>, <sairaj.arunkodilkar@....com>, <jon.grimm@....com>,
	<prashanthpra@...gle.com>, <wvw@...gle.com>, <wnliu@...gle.com>,
	<gptran@...gle.com>, <kpsingh@...gle.com>
Subject: Re: [PATCH v2] iommu/amd: Add support for hw_info for iommu
 capability query

On Wed, Aug 27, 2025 at 02:22:50PM +0000, Suravee Suthikulpanit wrote:
> AMD IOMMU Extended Feature (EFR) and Extended Feature 2 (EFR2) registers
> specify features supported by each IOMMU hardware instance.
> The IOMMU driver checks each feature-specific bits before enabling
> each feature at run time.
> 
> For IOMMUFD, the hypervisor passes the raw value of amd_iommu_efr and
> amd_iommu_efr2 to VMM via iommufd IOMMU_DEVICE_GET_HW_INFO ioctl.
> 
> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@....com>

Reviewed-by: Nicolin Chen <nicolinc@...dia.com>

With some nits:

> diff --git a/drivers/iommu/amd/iommufd.h b/drivers/iommu/amd/iommufd.h
> new file mode 100644
> index 000000000000..7c30dcc66a59
> --- /dev/null
> +++ b/drivers/iommu/amd/iommufd.h
> @@ -0,0 +1,11 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Copyright (C) 2025 Advanced Micro Devices, Inc.
> + */
> +
> +#ifndef AMD_IOMMUFD_H
> +#define AMD_IOMMUFD_H
> +
> +extern void *amd_iommufd_hw_info(struct device *dev, u32 *length, u32 *type);

No need of "extern"?

> +/**
> + * struct iommu_hw_info_amd - AMD IOMMU device info
> + *
> + * @efr : Value of AMD IOMMU Extended Feature Register (EFR) reported by hardware
> + * @efr2: Value of AMD IOMMU Extended Feature 2 Register (EFR2) reported by hardware
> + *
> + * Please See description of these registers in the following sections of
> + * the AMD I/O Virtualization Technology (IOMMU) Specification.
> + * (https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/specifications/48882_IOMMU.pdf)

The link gives me:

404: Page Not Found
Sorry, we couldn’t find that page.

:-/

>  /**
>   * enum iommu_hw_info_type - IOMMU Hardware Info Types
>   * @IOMMU_HW_INFO_TYPE_NONE: Output by the drivers that do not report hardware
> @@ -629,6 +647,7 @@ enum iommu_hw_info_type {
>  	IOMMU_HW_INFO_TYPE_INTEL_VTD = 1,
>  	IOMMU_HW_INFO_TYPE_ARM_SMMUV3 = 2,
>  	IOMMU_HW_INFO_TYPE_TEGRA241_CMDQV = 3,
> +	IOMMU_HW_INFO_TYPE_AMD = 4,

Missing an update in the kdoc above.

Nicolin