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Message-ID:
<LV3PR12MB926507DF8A992FA953F22E099438A@LV3PR12MB9265.namprd12.prod.outlook.com>
Date: Wed, 27 Aug 2025 16:15:18 +0000
From: "Kaplan, David" <David.Kaplan@....com>
To: Borislav Petkov <bp@...en8.de>
CC: Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>, Thomas Gleixner
<tglx@...utronix.de>, Peter Zijlstra <peterz@...radead.org>, Josh Poimboeuf
<jpoimboe@...nel.org>, Ingo Molnar <mingo@...hat.com>, Dave Hansen
<dave.hansen@...ux.intel.com>, "x86@...nel.org" <x86@...nel.org>, "H . Peter
Anvin" <hpa@...or.com>, "linux-kernel@...r.kernel.org"
<linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v2 4/5] x86/bugs: Add attack vector controls for SSB
[AMD Official Use Only - AMD Internal Distribution Only]
> -----Original Message-----
> From: Borislav Petkov <bp@...en8.de>
> Sent: Wednesday, August 27, 2025 11:12 AM
> To: Kaplan, David <David.Kaplan@....com>
> Cc: Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>; Thomas Gleixner
> <tglx@...utronix.de>; Peter Zijlstra <peterz@...radead.org>; Josh Poimboeuf
> <jpoimboe@...nel.org>; Ingo Molnar <mingo@...hat.com>; Dave Hansen
> <dave.hansen@...ux.intel.com>; x86@...nel.org; H . Peter Anvin
> <hpa@...or.com>; linux-kernel@...r.kernel.org
> Subject: Re: [PATCH v2 4/5] x86/bugs: Add attack vector controls for SSB
>
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
>
>
> On Wed, Aug 27, 2025 at 03:47:10PM +0000, Kaplan, David wrote:
> > After reviewing this further, this change should be removed. The AUTO mitigation
> is intended to say 'choose based on attack vector', but with this patch you're not
> looking at ssb_mode to decide to do that. You're looking at the ssb mitigation cmd
> (which already defaults to SPEC_STORE_BYPASS_CMD_AUTO). Therefore there
> is no need for a SPEC_STORE_BYPASS_AUTO setting of ssb_mode.
> >
> > (The clean-up patch removes ssb_mitigation_cmd entirely, so it needs an AUTO
> setting of ssb_mitigation)
>
> ...
>
> > But more importantly, please remove this. That's because in the current patch, if
> the user says 'nospec_store_bypass_disable' then the ssb_select_mitigation()
> function does not change ssb_mode. So it needs to default to NONE.
>
> Yah, agreed with both. Here's a minimal thing.
>
> ---
> From: David Kaplan <david.kaplan@....com>
> Date: Tue, 19 Aug 2025 14:21:59 -0500
> Subject: [PATCH] x86/bugs: Add attack vector controls for SSB
>
> Attack vector controls for SSB were missed in the initial attack vector series.
> The default mitigation for SSB requires user-space opt-in so it is only
> relevant for user->user attacks. Add an AUTO mitigation for SSB and use this
> attack vector control to select the SSB mitigation.
>
> Fixes: 2d31d2874663 ("x86/bugs: Define attack vectors relevant for each bug")
> Signed-off-by: David Kaplan <david.kaplan@....com>
> Signed-off-by: Borislav Petkov (AMD) <bp@...en8.de>
> Link: https://lore.kernel.org/20250819192200.2003074-5-david.kaplan@amd.com
> ---
> .../admin-guide/hw-vuln/attack_vector_controls.rst | 5 +----
> arch/x86/kernel/cpu/bugs.c | 9 +++++++++
> 2 files changed, 10 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/admin-guide/hw-vuln/attack_vector_controls.rst
> b/Documentation/admin-guide/hw-vuln/attack_vector_controls.rst
> index 6dd0800146f6..5964901d66e3 100644
> --- a/Documentation/admin-guide/hw-vuln/attack_vector_controls.rst
> +++ b/Documentation/admin-guide/hw-vuln/attack_vector_controls.rst
> @@ -215,7 +215,7 @@ Spectre_v2 X X
> Spectre_v2_user X X * (Note 1)
> SRBDS X X X X
> SRSO X X X X
> -SSB (Note 4)
> +SSB X
> TAA X X X X * (Note 2)
> TSA X X X X
> =============== ============== ============ =============
> ============== ============ ========
> @@ -229,9 +229,6 @@ Notes:
> 3 -- Disables SMT if cross-thread mitigations are fully enabled, the CPU is
> vulnerable, and STIBP is not supported
>
> - 4 -- Speculative store bypass is always enabled by default (no kernel
> - mitigation applied) unless overridden with spec_store_bypass_disable option
> -
> When an attack-vector is disabled, all mitigations for the vulnerabilities
> listed in the above table are disabled, unless mitigation is required for a
> different enabled attack-vector or a mitigation is explicitly selected via a
> diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
> index 49ef1b832c1a..af838b8d845c 100644
> --- a/arch/x86/kernel/cpu/bugs.c
> +++ b/arch/x86/kernel/cpu/bugs.c
> @@ -416,6 +416,10 @@ static bool __init should_mitigate_vuln(unsigned int bug)
> cpu_attack_vector_mitigated(CPU_MITIGATE_USER_USER) ||
> cpu_attack_vector_mitigated(CPU_MITIGATE_GUEST_GUEST) ||
> (smt_mitigations != SMT_MITIGATIONS_OFF);
> +
> + case X86_BUG_SPEC_STORE_BYPASS:
> + return cpu_attack_vector_mitigated(CPU_MITIGATE_USER_USER);
> +
> default:
> WARN(1, "Unknown bug %x\n", bug);
> return false;
> @@ -2710,6 +2714,11 @@ static void __init ssb_select_mitigation(void)
> ssb_mode = SPEC_STORE_BYPASS_DISABLE;
> break;
> case SPEC_STORE_BYPASS_CMD_AUTO:
> + if (should_mitigate_vuln(X86_BUG_SPEC_STORE_BYPASS))
> + ssb_mode = SPEC_STORE_BYPASS_PRCTL;
> + else
> + ssb_mode = SPEC_STORE_BYPASS_NONE;
> + break;
> case SPEC_STORE_BYPASS_CMD_PRCTL:
> ssb_mode = SPEC_STORE_BYPASS_PRCTL;
> break;
> --
> 2.51.0
>
LGTM. Just make sure to update the commit description since it no longer is adding an AUTO mitigation.
Thanks --David Kaplan
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