linux-kernel - Re: [External] Re: [RFC PATCH 0/4] riscv: Add Zalasr ISA exntesion support

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Message-ID: <CAPYmKFuZ5y=q-tpmgMzGFEy6y=UPDf5vLg4gS8VAEkAKBr6BmQ@mail.gmail.com>
Date: Wed, 27 Aug 2025 10:26:06 +0800
From: Xu Lu <luxu.kernel@...edance.com>
To: Conor Dooley <conor@...nel.org>
Cc: paul.walmsley@...ive.com, palmer@...belt.com, aou@...s.berkeley.edu, 
	alex@...ti.fr, ajones@...tanamicro.com, brs@...osinc.com, 
	linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [External] Re: [RFC PATCH 0/4] riscv: Add Zalasr ISA exntesion support

Hi Conor,

On Wed, Aug 27, 2025 at 1:46 AM Conor Dooley <conor@...nel.org> wrote:
>
> On Tue, Aug 26, 2025 at 10:57:36PM +0800, Xu Lu wrote:
> > This patch adds support for the Zalasr ISA extension, which supplies the
> > real load acquire/store release instructions.
> >
> > The specification can be found here:
> > https://github.com/riscv/riscv-zalasr/blob/main/chapter2.adoc
>
> Why is this an RFC?

There is still some code using fence to simulate real
load-acquire/store-release insns. For example, RISCV_ACQUIRE_BARRIER
and RISCV_RELEASE_BARRIER, etc. I will resend a formal patch series
after I modify them.

> Is the RFC tag related to how you have not CCed all relevant mailing
> lists and maintainers?

Sorry about this. I will recheck the maintainer list next time.

Best regards,
Xu Lu

>
> Cheers,
> Conor.
>
> >
> > Xu Lu (4):
> >   riscv: add ISA extension parsing for Zalasr
> >   dt-bindings: riscv: Add Zalasr ISA extension description
> >   riscv: Instroduce Zalasr instructions
> >   riscv: Use Zalasr for smp_load_acquire/smp_store_release
> >
> >  .../devicetree/bindings/riscv/extensions.yaml |  5 ++
> >  arch/riscv/include/asm/barrier.h              | 79 ++++++++++++++++---
> >  arch/riscv/include/asm/hwcap.h                |  1 +
> >  arch/riscv/include/asm/insn-def.h             | 79 +++++++++++++++++++
> >  arch/riscv/kernel/cpufeature.c                |  1 +
> >  5 files changed, 154 insertions(+), 11 deletions(-)
> >
> > --
> > 2.20.1
> >