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Message-Id: <20250827100959.83023-1-cuiyunhui@bytedance.com>
Date: Wed, 27 Aug 2025 18:09:57 +0800
From: Yunhui Cui <cuiyunhui@...edance.com>
To: paul.walmsley@...ive.com,
	palmer@...belt.com,
	aou@...s.berkeley.edu,
	alex@...ti.fr,
	atish.patra@...ux.dev,
	anup@...infault.org,
	will@...nel.org,
	mark.rutland@....com,
	linux-riscv@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	linux-perf-users@...r.kernel.org,
	catalin.marinas@....com,
	masahiroy@...nel.org,
	suzuki.poulose@....com,
	cuiyunhui@...edance.com,
	maz@...nel.org,
	zhanjie9@...ilicon.com,
	yangyicong@...ilicon.com,
	dianders@...omium.org,
	mingo@...nel.org,
	lihuafei1@...wei.com,
	akpm@...ux-foundation.org,
	jpoimboe@...nel.org,
	rppt@...nel.org,
	kees@...nel.org,
	thomas.weissschuh@...utronix.de
Subject: [PATCH 0/2] Add HARDLOCKUP_DETECTOR_PERF for riscv 

This patchset is mainly based on RISCV_SSE, and the enabling of the
hardlockup perf feature depends on RISCV_PMU_SSE.
Link: https://lore.kernel.org/all/20250808153901.2477005-1-cleger@rivosinc.com/
patch[1]: Move watchdog_hld.c to kernel/ to facilitate reuse by RISC-V.
patch[2]: Add Kconfig selections for RISC-V.

Yunhui Cui (2):
  watchdog: refactor watchdog_hld functionality
  riscv: add HARDLOCKUP_DETECTOR_PERF support

 arch/arm64/kernel/Makefile                   | 1 -
 arch/riscv/Kconfig                           | 3 +++
 drivers/perf/arm_pmu.c                       | 2 +-
 drivers/perf/riscv_pmu_sbi.c                 | 8 ++++++++
 include/linux/nmi.h                          | 1 +
 include/linux/perf/arm_pmu.h                 | 2 --
 kernel/Makefile                              | 2 +-
 {arch/arm64/kernel => kernel}/watchdog_hld.c | 8 ++++++--
 8 files changed, 20 insertions(+), 7 deletions(-)
 rename {arch/arm64/kernel => kernel}/watchdog_hld.c (97%)

-- 
2.39.5


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