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Message-Id: <20250827100959.83023-3-cuiyunhui@bytedance.com>
Date: Wed, 27 Aug 2025 18:09:59 +0800
From: Yunhui Cui <cuiyunhui@...edance.com>
To: paul.walmsley@...ive.com,
	palmer@...belt.com,
	aou@...s.berkeley.edu,
	alex@...ti.fr,
	atish.patra@...ux.dev,
	anup@...infault.org,
	will@...nel.org,
	mark.rutland@....com,
	linux-riscv@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	linux-perf-users@...r.kernel.org,
	catalin.marinas@....com,
	masahiroy@...nel.org,
	suzuki.poulose@....com,
	cuiyunhui@...edance.com,
	maz@...nel.org,
	zhanjie9@...ilicon.com,
	yangyicong@...ilicon.com,
	dianders@...omium.org,
	mingo@...nel.org,
	lihuafei1@...wei.com,
	akpm@...ux-foundation.org,
	jpoimboe@...nel.org,
	rppt@...nel.org,
	kees@...nel.org,
	thomas.weissschuh@...utronix.de
Subject: [PATCH 2/2] riscv: add HARDLOCKUP_DETECTOR_PERF support

Reuse watchdog_hld.c to enable HARDLOCKUP_DETECTOR_PERF and
add Kconfig selections for RISC-V.

Signed-off-by: Yunhui Cui <cuiyunhui@...edance.com>
---
 arch/riscv/Kconfig           | 3 +++
 drivers/perf/riscv_pmu_sbi.c | 8 ++++++++
 2 files changed, 11 insertions(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 451eb23d86c96..214b1ead5781a 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -184,6 +184,9 @@ config RISCV
 	select HAVE_PAGE_SIZE_4KB
 	select HAVE_PCI
 	select HAVE_PERF_EVENTS
+	select PERF_EVENTS
+	select HAVE_PERF_EVENTS_NMI if RISCV_SSE && RISCV_PMU_SSE
+	select HAVE_HARDLOCKUP_DETECTOR_PERF if PERF_EVENTS && HAVE_PERF_EVENTS_NMI
 	select HAVE_PERF_REGS
 	select HAVE_PERF_USER_STACK_DUMP
 	select HAVE_POSIX_CPU_TIMERS_TASK_WORK
diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
index 8c1ac7985df6c..c5423a046d016 100644
--- a/drivers/perf/riscv_pmu_sbi.c
+++ b/drivers/perf/riscv_pmu_sbi.c
@@ -22,6 +22,7 @@
 #include <linux/sched/clock.h>
 #include <linux/soc/andes/irq.h>
 #include <linux/workqueue.h>
+#include <linux/nmi.h>
 
 #include <asm/errata_list.h>
 #include <asm/sbi.h>
@@ -1102,6 +1103,11 @@ static int pmu_sbi_setup_sse(struct riscv_pmu *pmu)
 }
 #endif
 
+bool arch_pmu_irq_is_nmi(void)
+{
+	return IS_ENABLED(CONFIG_RISCV_PMU_SSE);
+}
+
 static int pmu_sbi_starting_cpu(unsigned int cpu, struct hlist_node *node)
 {
 	struct riscv_pmu *pmu = hlist_entry_safe(node, struct riscv_pmu, node);
@@ -1525,6 +1531,8 @@ static int __init pmu_sbi_devinit(void)
 	/* Notify legacy implementation that SBI pmu is available*/
 	riscv_pmu_legacy_skip_init();
 
+	lockup_detector_retry_init();
+
 	return ret;
 }
 device_initcall(pmu_sbi_devinit)
-- 
2.39.5


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