linux-kernel - Re: [PATCH] LoongArch: Handle newly added llsc instructions for probes

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Message-ID: <CAAhV-H7qjHk_E_SvM-OqRKiasvykoM2bjLJObCCDs0kbDSS3Vw@mail.gmail.com>
Date: Wed, 27 Aug 2025 18:17:55 +0800
From: Huacai Chen <chenhuacai@...nel.org>
To: Tiezhu Yang <yangtiezhu@...ngson.cn>
Cc: loongarch@...ts.linux.dev, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] LoongArch: Handle newly added llsc instructions for probes

Applied, thanks.

Huacai

On Tue, Aug 26, 2025 at 2:40 PM Tiezhu Yang <yangtiezhu@...ngson.cn> wrote:
>
> The atomic instructions sc.q, llacq.{w/d}, screl.{w/d} were newly added
> in the LoongArch Reference Manual v1.10, it is necessary to handle them
> in insns_not_supported() to avoid putting a breakpoint in the middle of
> a ll/sc atomic sequence, otherwise it will loop forever for kprobes and
> uprobes.
>
> Signed-off-by: Tiezhu Yang <yangtiezhu@...ngson.cn>
> ---
>  arch/loongarch/include/asm/inst.h |  5 +++++
>  arch/loongarch/kernel/inst.c      | 12 ++++++++++++
>  2 files changed, 17 insertions(+)
>
> diff --git a/arch/loongarch/include/asm/inst.h b/arch/loongarch/include/asm/inst.h
> index 277d2140676b..55e64a12a124 100644
> --- a/arch/loongarch/include/asm/inst.h
> +++ b/arch/loongarch/include/asm/inst.h
> @@ -77,6 +77,10 @@ enum reg2_op {
>         iocsrwrh_op     = 0x19205,
>         iocsrwrw_op     = 0x19206,
>         iocsrwrd_op     = 0x19207,
> +       llacqw_op       = 0xe15e0,
> +       screlw_op       = 0xe15e1,
> +       llacqd_op       = 0xe15e2,
> +       screld_op       = 0xe15e3,
>  };
>
>  enum reg2i5_op {
> @@ -189,6 +193,7 @@ enum reg3_op {
>         fldxd_op        = 0x7068,
>         fstxs_op        = 0x7070,
>         fstxd_op        = 0x7078,
> +       scq_op          = 0x70ae,
>         amswapw_op      = 0x70c0,
>         amswapd_op      = 0x70c1,
>         amaddw_op       = 0x70c2,
> diff --git a/arch/loongarch/kernel/inst.c b/arch/loongarch/kernel/inst.c
> index 72ecfed29d55..4026edea9bdd 100644
> --- a/arch/loongarch/kernel/inst.c
> +++ b/arch/loongarch/kernel/inst.c
> @@ -141,6 +141,18 @@ bool insns_not_supported(union loongarch_instruction insn)
>         case amswapw_op ... ammindbdu_op:
>                 pr_notice("atomic memory access instructions are not supported\n");
>                 return true;
> +       case scq_op:
> +               pr_notice("sc.q instruction is not supported\n");
> +               return true;
> +       }
> +
> +       switch (insn.reg2_format.opcode) {
> +       case llacqw_op:
> +       case llacqd_op:
> +       case screlw_op:
> +       case screld_op:
> +               pr_notice("llacq and screl instructions are not supported\n");
> +               return true;
>         }
>
>         switch (insn.reg2i14_format.opcode) {
> --
> 2.42.0
>
>