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Message-ID: <f093fc68-c783-41eb-b51e-e48a18e6d2cf@kernel.org>
Date: Wed, 27 Aug 2025 14:48:58 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: weishangjuan@...incomputing.com, devicetree@...r.kernel.org,
 andrew+netdev@...n.ch, davem@...emloft.net, edumazet@...gle.com,
 kuba@...nel.org, pabeni@...hat.com, robh@...nel.org, krzk+dt@...nel.org,
 conor+dt@...nel.org, linux-arm-kernel@...ts.infradead.org,
 mcoquelin.stm32@...il.com, alexandre.torgue@...s.st.com,
 yong.liang.choong@...ux.intel.com, vladimir.oltean@....com,
 rmk+kernel@...linux.org.uk, faizal.abdul.rahim@...ux.intel.com,
 prabhakar.mahadev-lad.rj@...renesas.com, inochiama@...il.com,
 jan.petrous@....nxp.com, jszhang@...nel.org, p.zabel@...gutronix.de,
 boon.khai.ng@...era.com, 0x1207@...il.com, netdev@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-stm32@...md-mailman.stormreply.com
Cc: ningyu@...incomputing.com, linmin@...incomputing.com,
 lizhi2@...incomputing.com
Subject: Re: [PATCH v4 1/2] dt-bindings: ethernet: eswin: Document for EIC7700
 SoC

On 27/08/2025 10:13, weishangjuan@...incomputing.com wrote:
> +  clocks:
> +    items:
> +      - description: GMAC main clock
> +      - description: Tx clock
> +      - description: AXI clock
> +      - description: Configuration clock
> +
> +  clock-names:
> +    contains:

This part did not improve:
items: instead

> +      enum:
> +        - axi
> +        - cfg
> +        - stmmaceth
> +        - tx
> +
> +  resets:
> +    maxItems: 1
> +
> +  reset-names:
> +    items:
> +      - const: stmmaceth
> +
> +  rx-internal-delay-ps:
> +    enum: [0, 200, 600, 1200, 1600, 1800, 2000, 2200, 2400]
> +
> +  tx-internal-delay-ps:
> +    enum: [0, 200, 600, 1200, 1600, 1800, 2000, 2200, 2400]
> +
> +  eswin,hsp-sp-csr:
> +    $ref: /schemas/types.yaml#/definitions/phandle-array
> +    items:
> +      - description: Phandle to HSP(High-Speed Peripheral) device
> +      - description: Offset of phy control register for internal
> +                     or external clock selection
> +      - description: Offset of AXI clock controller Low-Power request
> +                     register
> +      - description: Offset of register controlling TX/RX clock delay
> +    description: |
> +      A phandle to hsp-sp-csr with three arguments that configure
> +      HSP(High-Speed Peripheral) device. The argument one is the
> +      offset of phy control register for internal or external clock
> +      selection, the argument two is Offset of AXI clock controller
> +      Low-Power request register, the argument three is Offset of
> +      register controlling TX/RX clock delay.

Description is mostly redundant - it is already part of items:. Just say
here "HSP (High Spee....) device needed to configure clock selection,
clock low-power mode and clock delay." or something similar.

> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - clock-names
Best regards,
Krzysztof

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