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Message-ID: <2e4c3c00-b248-421e-8ff1-d24b7b03be1a@arm.com>
Date: Thu, 28 Aug 2025 16:58:16 +0100
From: James Morse <james.morse@....com>
To: Dave Martin <Dave.Martin@....com>
Cc: linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-acpi@...r.kernel.org, devicetree@...r.kernel.org,
D Scott Phillips OS <scott@...amperecomputing.com>,
carl@...amperecomputing.com, lcherian@...vell.com,
bobo.shaobowang@...wei.com, tan.shaopeng@...itsu.com,
baolin.wang@...ux.alibaba.com, Jamie Iles <quic_jiles@...cinc.com>,
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dfustini@...libre.com, amitsinght@...vell.com,
David Hildenbrand <david@...hat.com>, Rex Nie <rex.nie@...uarmicro.com>,
Koba Ko <kobak@...dia.com>, Shanker Donthineni <sdonthineni@...dia.com>,
fenghuay@...dia.com, baisheng.gao@...soc.com,
Jonathan Cameron <jonathan.cameron@...wei.com>, Rob Herring
<robh@...nel.org>, Rohit Mathew <rohit.mathew@....com>,
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Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Danilo Krummrich <dakr@...nel.org>
Subject: Re: [PATCH 06/33] ACPI / PPTT: Add a helper to fill a cpumask from a
cache_id
Hi Dave,
On 27/08/2025 11:53, Dave Martin wrote:
> On Fri, Aug 22, 2025 at 03:29:47PM +0000, James Morse wrote:
>> MPAM identifies CPUs by the cache_id in the PPTT cache structure.
>>
>> The driver needs to know which CPUs are associated with the cache,
>> the CPUs may not all be online, so cacheinfo does not have the
>> information.
>
> Nit: cacheinfo lacking the information is not a consequence of the
> driver needing it.
>
> Maybe split the sentence:
>
> -> "[...] associated with the cache. The CPUs may not [...]"
Sure,
>> Add a helper to pull this information out of the PPTT.
>> diff --git a/drivers/acpi/pptt.c b/drivers/acpi/pptt.c
>> index 660457644a5b..cb93a9a7f9b6 100644
>> --- a/drivers/acpi/pptt.c
>> +++ b/drivers/acpi/pptt.c
>> @@ -971,3 +971,65 @@ int find_acpi_cache_level_from_id(u32 cache_id)
>>
>> return -ENOENT;
>> }
>> +
>> +/**
>> + * acpi_pptt_get_cpumask_from_cache_id() - Get the cpus associated with the
>> + * specified cache
>> + * @cache_id: The id field of the unified cache
>> + * @cpus: Where to build the cpumask
>> + *
>> + * Determine which CPUs are below this cache in the PPTT. This allows the property
>> + * to be found even if the CPUs are offline.
>> + *
>> + * The PPTT table must be rev 3 or later,
>> + *
>> + * Return: -ENOENT if the PPTT doesn't exist, or the cache cannot be found.
>> + * Otherwise returns 0 and sets the cpus in the provided cpumask.
>> + */
>> +int acpi_pptt_get_cpumask_from_cache_id(u32 cache_id, cpumask_t *cpus)
>> +{
>> + u32 acpi_cpu_id;
>> + int level, cpu, num_levels;
>> + struct acpi_pptt_cache *cache;
>> + struct acpi_pptt_cache_v1 *cache_v1;
>> + struct acpi_pptt_processor *cpu_node;
>> + struct acpi_table_header *table __free(acpi_table) = acpi_get_table_ret(ACPI_SIG_PPTT, 0);
>> +
>> + cpumask_clear(cpus);
>> +
>> + if (IS_ERR(table))
>> + return -ENOENT;
>> +
>> + if (table->revision < 3)
>> + return -ENOENT;
>> +
>> + /*
>> + * If we found the cache first, we'd still need to walk from each cpu.
>> + */
>> + for_each_possible_cpu(cpu) {
>> + acpi_cpu_id = get_acpi_id_for_cpu(cpu);
>> + cpu_node = acpi_find_processor_node(table, acpi_cpu_id);
>> + if (!cpu_node)
>> + return 0;
>> + num_levels = acpi_count_levels(table, cpu_node, NULL);
>> +
>> + /* Start at 1 for L1 */
>> + for (level = 1; level <= num_levels; level++) {
>> + cache = acpi_find_cache_node(table, acpi_cpu_id,
>> + ACPI_PPTT_CACHE_TYPE_UNIFIED,
>> + level, &cpu_node);
>> + if (!cache)
>> + continue;
>> +
>> + cache_v1 = ACPI_ADD_PTR(struct acpi_pptt_cache_v1,
>> + cache,
>> + sizeof(struct acpi_pptt_cache));
>> +
>> + if (cache->flags & ACPI_PPTT_CACHE_ID_VALID &&
>> + cache_v1->cache_id == cache_id)
>> + cpumask_set_cpu(cpu, cpus);
> Again, it feels like we are repeating the same walk multiple times to
> determine how deep the table is (on which point the table is self-
> describing anyway), and then again to derive some static property, and
> then we are then doing all of that work multiple times to derive
> different static properties, etc.
>
> Can we not just walk over the tables once and stash the derived
> properties somewhere?
That is possible - but its a more invasive change to the PPTT parsing code.
Before the introduction of the leaf flag, the search for a processor also included a
search to check if the discovered node was a leaf.
I think this is trading time - walking over the table multiple times, against the memory
you'd need to de-serialise the tree to find the necessary properties quickly. I think the
reason Jeremy L went this way was because there may never be another request into this
code, so being ready with a quick answer was a waste of memory.
MPAM doesn't change this - all these things are done up front during driver probing, and
the values are cached by the driver.
> I'm still getting my head around this parsing code, so I'm not saying
> that the approach is incorrect here -- just wondering whether there is
> a way to make it simpler.
It's walked at boot, and on cpu-hotplug. Neither are particularly performance critical.
I agree that as platforms get bigger, there will be a tipping point ... I don't think
anyone has complained yet!
Thanks,
James
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