linux-kernel - [PATCH 1/2] dt-bindings: gpu: mali-valhall-csf: add asn-hash

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Message-ID: <20250828201806.3541261-2-olvaffe@gmail.com>
Date: Thu, 28 Aug 2025 13:18:05 -0700
From: Chia-I Wu <olvaffe@...il.com>
To: Boris Brezillon <boris.brezillon@...labora.com>,
	Steven Price <steven.price@....com>,
	Liviu Dudau <liviu.dudau@....com>,
	Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
	Maxime Ripard <mripard@...nel.org>,
	Thomas Zimmermann <tzimmermann@...e.de>,
	David Airlie <airlied@...il.com>,
	Simona Vetter <simona@...ll.ch>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	dri-devel@...ts.freedesktop.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: [PATCH 1/2] dt-bindings: gpu: mali-valhall-csf: add asn-hash

The values are written to ASN_HASH[0..2] registers. The property is
called "l2-hash-values" in the downstream driver.

Signed-off-by: Chia-I Wu <olvaffe@...il.com>
---
 .../devicetree/bindings/gpu/arm,mali-valhall-csf.yaml     | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
index a5b4e00217587..258bcba66d1d1 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
@@ -85,6 +85,14 @@ properties:
 
   dma-coherent: true
 
+  asn-hash:
+    $ref: /schemas/types.yaml#/definitions/uint32-array
+    description:
+      The values are written to ASN_HASH[0..2] registers. They affect how
+      physical addresses are mapped to L2 cache slices.
+    minItems: 3
+    maxItems: 3
+
 required:
   - compatible
   - reg
-- 
2.51.0.318.gd7df087d1a-goog