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Message-ID: <CAEg-Je_mgErxSHk_OaBCwzNXwPcwNsAQuAutAUNdJK2AU88w8Q@mail.gmail.com>
Date: Wed, 27 Aug 2025 22:58:39 -0400
From: Neal Gompa <neal@...pa.dev>
To: Janne Grunau <j@...nau.net>
Cc: Sven Peter <sven@...nel.org>, Alyssa Rosenzweig <alyssa@...enzweig.io>,
Joerg Roedel <joro@...tes.org>, Will Deacon <will@...nel.org>, Robin Murphy <robin.murphy@....com>,
asahi@...ts.linux.dev, linux-arm-kernel@...ts.infradead.org,
iommu@...ts.linux.dev, linux-kernel@...r.kernel.org,
Hector Martin <marcan@...can.st>
Subject: Re: [PATCH v2 0/3] iommu/apple-dart: Four level page table support
On Thu, Aug 21, 2025 at 6:16 AM Janne Grunau <j@...nau.net> wrote:
>
> The DART instances found in T602x based SoCs (Apple's M2 Pro/Max/Ultra)
> indicate an IAS of 42 bit. This results in alloc_io_pgtable_ops()
> failing as io-pgtable-dart supports at most 36-bit IAS.
> The t8110 DART design supports 4-level page tables. Implement support
> for this in io-pgtable-dart and mark DART stream with more than 36-bit
> IAS as 4-level page tables.
>
> Signed-off-by: Janne Grunau <j@...nau.net>
> ---
> Changes in v2:
> - simplified 4 page table level use in apple_dart_hw_enable_translation()
> - use "iommu/{apple,io-pgtable}-dart:" as commit subject prefix
> - added Sven's Rb:
> - Link to v1: https://lore.kernel.org/r/20250814-apple-dart-4levels-v1-0-db2214a78c08@jannau.net
>
> ---
> Hector Martin (3):
> iommu/apple-dart: Make the hw register fields u32s
> iommu/io-pgtable-dart: Add 4-level page table support
> iommu/apple-dart: Add 4-level page table support
>
> drivers/iommu/apple-dart.c | 50 +++++++++-----
> drivers/iommu/io-pgtable-dart.c | 143 ++++++++++++++++++++++++----------------
> include/linux/io-pgtable.h | 1 +
> 3 files changed, 121 insertions(+), 73 deletions(-)
> ---
> base-commit: 8f5ae30d69d7543eee0d70083daf4de8fe15d585
> change-id: 20250811-apple-dart-4levels-8f9ae8ac1347
>
Series LGTM.
Reviewed-by: Neal Gompa <neal@...pa.dev>
--
真実はいつも一つ!/ Always, there's only one truth!
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