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Message-ID: <4326a387-4d2d-44ef-87df-17aca68aacd7@phytec.de>
Date: Thu, 28 Aug 2025 14:46:50 +0300
From: Wadim Egorov <w.egorov@...tec.de>
To: Beleswar Padhi <b-padhi@...com>, nm@...com, vigneshr@...com,
kristo@...nel.org, robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org
Cc: afd@...com, u-kumar1@...com, hnagalla@...com, jm@...com,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v2 08/33] arm64: dts: ti: k3-am64: Enable remote
processors at board level
On 8/23/25 7:08 PM, Beleswar Padhi wrote:
> Remote Processors defined in top-level AM64x SoC dtsi files are
> incomplete without the memory carveouts and mailbox assignments which
> are only known at board integration level.
>
> Therefore, disable the remote processors at SoC level and enable them at
> board level where above information is available.
>
> Signed-off-by: Beleswar Padhi <b-padhi@...com>
Reviewed-by: Wadim Egorov <w.egorov@...tec.de>
Tested-by: Wadim Egorov <w.egorov@...tec.de> # phycore-am64x
> ---
> v2: Changelog:
> 1. Re-ordered patch from [PATCH 26/33] to [PATCH v2 08/33].
>
> Link to v1:
> https://lore.kernel.org/all/20250814223839.3256046-27-b-padhi@ti.com/
>
> arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 6 ++++++
> arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi | 12 ++++++++++++
> arch/arm64/boot/dts/ti/k3-am642-evm.dts | 12 ++++++++++++
> arch/arm64/boot/dts/ti/k3-am642-sk.dts | 12 ++++++++++++
> arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi | 12 ++++++++++++
> arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi | 12 ++++++++++++
> 6 files changed, 66 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
> index c7e5da37486a..d872cc671094 100644
> --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
> @@ -921,6 +921,7 @@ main_r5fss0: r5fss@...00000 {
> <0x78200000 0x00 0x78200000 0x08000>,
> <0x78300000 0x00 0x78300000 0x08000>;
> power-domains = <&k3_pds 119 TI_SCI_PD_EXCLUSIVE>;
> + status = "disabled";
>
> main_r5fss0_core0: r5f@...00000 {
> compatible = "ti,am64-r5f";
> @@ -935,6 +936,7 @@ main_r5fss0_core0: r5f@...00000 {
> ti,atcm-enable = <1>;
> ti,btcm-enable = <1>;
> ti,loczrama = <1>;
> + status = "disabled";
> };
>
> main_r5fss0_core1: r5f@...00000 {
> @@ -950,6 +952,7 @@ main_r5fss0_core1: r5f@...00000 {
> ti,atcm-enable = <1>;
> ti,btcm-enable = <1>;
> ti,loczrama = <1>;
> + status = "disabled";
> };
> };
>
> @@ -963,6 +966,7 @@ main_r5fss1: r5fss@...00000 {
> <0x78600000 0x00 0x78600000 0x08000>,
> <0x78700000 0x00 0x78700000 0x08000>;
> power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
> + status = "disabled";
>
> main_r5fss1_core0: r5f@...00000 {
> compatible = "ti,am64-r5f";
> @@ -977,6 +981,7 @@ main_r5fss1_core0: r5f@...00000 {
> ti,atcm-enable = <1>;
> ti,btcm-enable = <1>;
> ti,loczrama = <1>;
> + status = "disabled";
> };
>
> main_r5fss1_core1: r5f@...00000 {
> @@ -992,6 +997,7 @@ main_r5fss1_core1: r5f@...00000 {
> ti,atcm-enable = <1>;
> ti,btcm-enable = <1>;
> ti,loczrama = <1>;
> + status = "disabled";
> };
> };
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
> index d9d491b12c33..03c46d74ebb5 100644
> --- a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
> @@ -349,28 +349,40 @@ &main_pktdma {
> bootph-all;
> };
>
> +&main_r5fss0 {
> + status = "okay";
> +};
> +
> &main_r5fss0_core0 {
> mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
> memory-region = <&main_r5fss0_core0_dma_memory_region>,
> <&main_r5fss0_core0_memory_region>;
> + status = "okay";
> };
>
> &main_r5fss0_core1 {
> mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
> memory-region = <&main_r5fss0_core1_dma_memory_region>,
> <&main_r5fss0_core1_memory_region>;
> + status = "okay";
> +};
> +
> +&main_r5fss1 {
> + status = "okay";
> };
>
> &main_r5fss1_core0 {
> mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
> memory-region = <&main_r5fss1_core0_dma_memory_region>,
> <&main_r5fss1_core0_memory_region>;
> + status = "okay";
> };
>
> &main_r5fss1_core1 {
> mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
> memory-region = <&main_r5fss1_core1_dma_memory_region>,
> <&main_r5fss1_core1_memory_region>;
> + status = "okay";
> };
>
> &mcu_m4fss {
> diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
> index e01866372293..a07503b192c9 100644
> --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
> @@ -764,28 +764,40 @@ mbox_m4_0: mbox-m4-0 {
> };
> };
>
> +&main_r5fss0 {
> + status = "okay";
> +};
> +
> &main_r5fss0_core0 {
> mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
> memory-region = <&main_r5fss0_core0_dma_memory_region>,
> <&main_r5fss0_core0_memory_region>;
> + status = "okay";
> };
>
> &main_r5fss0_core1 {
> mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
> memory-region = <&main_r5fss0_core1_dma_memory_region>,
> <&main_r5fss0_core1_memory_region>;
> + status = "okay";
> +};
> +
> +&main_r5fss1 {
> + status = "okay";
> };
>
> &main_r5fss1_core0 {
> mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
> memory-region = <&main_r5fss1_core0_dma_memory_region>,
> <&main_r5fss1_core0_memory_region>;
> + status = "okay";
> };
>
> &main_r5fss1_core1 {
> mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
> memory-region = <&main_r5fss1_core1_dma_memory_region>,
> <&main_r5fss1_core1_memory_region>;
> + status = "okay";
> };
>
> &mcu_m4fss {
> diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
> index 1deaa0be0085..ae4a6552644c 100644
> --- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
> @@ -679,28 +679,40 @@ mbox_m4_0: mbox-m4-0 {
> };
> };
>
> +&main_r5fss0 {
> + status = "okay";
> +};
> +
> &main_r5fss0_core0 {
> mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
> memory-region = <&main_r5fss0_core0_dma_memory_region>,
> <&main_r5fss0_core0_memory_region>;
> + status = "okay";
> };
>
> &main_r5fss0_core1 {
> mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
> memory-region = <&main_r5fss0_core1_dma_memory_region>,
> <&main_r5fss0_core1_memory_region>;
> + status = "okay";
> +};
> +
> +&main_r5fss1 {
> + status = "okay";
> };
>
> &main_r5fss1_core0 {
> mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
> memory-region = <&main_r5fss1_core0_dma_memory_region>,
> <&main_r5fss1_core0_memory_region>;
> + status = "okay";
> };
>
> &main_r5fss1_core1 {
> mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
> memory-region = <&main_r5fss1_core1_dma_memory_region>,
> <&main_r5fss1_core1_memory_region>;
> + status = "okay";
> };
>
> &mcu_m4fss {
> diff --git a/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi b/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi
> index a5cec9a07510..d0c1e4dc1da7 100644
> --- a/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am642-sr-som.dtsi
> @@ -488,28 +488,40 @@ AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* USB0_DRVVBUS.USB0_DRVVBUS */
> };
> };
>
> +&main_r5fss0 {
> + status = "okay";
> +};
> +
> &main_r5fss0_core0 {
> mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
> memory-region = <&main_r5fss0_core0_dma_memory_region>,
> <&main_r5fss0_core0_memory_region>;
> + status = "okay";
> };
>
> &main_r5fss0_core1 {
> mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
> memory-region = <&main_r5fss0_core1_dma_memory_region>,
> <&main_r5fss0_core1_memory_region>;
> + status = "okay";
> +};
> +
> +&main_r5fss1 {
> + status = "okay";
> };
>
> &main_r5fss1_core0 {
> mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
> memory-region = <&main_r5fss1_core0_dma_memory_region>,
> <&main_r5fss1_core0_memory_region>;
> + status = "okay";
> };
>
> &main_r5fss1_core1 {
> mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
> memory-region = <&main_r5fss1_core1_dma_memory_region>,
> <&main_r5fss1_core1_memory_region>;
> + status = "okay";
> };
>
> /* SoC default UART console */
> diff --git a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi b/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi
> index 828d815d6bdf..876cbb21961d 100644
> --- a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl.dtsi
> @@ -167,28 +167,40 @@ mbox_m4_0: mbox-m4-0 {
> };
> };
>
> +&main_r5fss0 {
> + status = "okay";
> +};
> +
> &main_r5fss0_core0 {
> mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
> memory-region = <&main_r5fss0_core0_dma_memory_region>,
> <&main_r5fss0_core0_memory_region>;
> + status = "okay";
> };
>
> &main_r5fss0_core1 {
> mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
> memory-region = <&main_r5fss0_core1_dma_memory_region>,
> <&main_r5fss0_core1_memory_region>;
> + status = "okay";
> +};
> +
> +&main_r5fss1 {
> + status = "okay";
> };
>
> &main_r5fss1_core0 {
> mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
> memory-region = <&main_r5fss1_core0_dma_memory_region>,
> <&main_r5fss1_core0_memory_region>;
> + status = "okay";
> };
>
> &main_r5fss1_core1 {
> mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
> memory-region = <&main_r5fss1_core1_dma_memory_region>,
> <&main_r5fss1_core1_memory_region>;
> + status = "okay";
> };
>
> &ospi0 {
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