linux-kernel - Re: [PATCH v3 3/4] iio: adc: ad7124: add external clock support

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Message-ID: <CAHp75VdtQ8vKULomgqPxwX=WZWUde7PC129BEznYqefd-U4DEQ@mail.gmail.com>
Date: Fri, 29 Aug 2025 18:53:06 +0300
From: Andy Shevchenko <andy.shevchenko@...il.com>
To: David Lechner <dlechner@...libre.com>
Cc: Michael Hennerich <Michael.Hennerich@...log.com>, Jonathan Cameron <jic23@...nel.org>, 
	Nuno Sá <nuno.sa@...log.com>, 
	Andy Shevchenko <andy@...nel.org>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, linux-iio@...r.kernel.org, 
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 3/4] iio: adc: ad7124: add external clock support

On Fri, Aug 29, 2025 at 12:55 AM David Lechner <dlechner@...libre.com> wrote:
>
> Add support for an external clock source to the AD7124 ADC driver.
>
> Previously, the driver only supported using the internal clock and had
> bad devicetree bindings that used a fake clock to essentially select
> the power mode. This is preserved for backwards compatibility.
>
> If the clock is not named "mclk", then we know that the devicetree is
> using the correct bindings and we can configure the chip to use an
> external clock source rather than internal.
>
> Also drop a redundant comment when configuring the register fields
> instead of adding more.

...

> +                       if (clk_hz > MEGA) {

I read your answer, but maybe I missed something?  Can we use (1 *
HZ_PER_MHZ) here?

> +                               clk_sel = AD7124_ADC_CONTROL_CLK_SEL_EXT_DIV4;
> +                               st->clk_hz = clk_hz / 4;
> +                       } else {
> +                               clk_sel = AD7124_ADC_CONTROL_CLK_SEL_EXT;
> +                               st->clk_hz = clk_hz;
> +                       }


-- 
With Best Regards,
Andy Shevchenko