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Message-ID: <dcb0c746-62ed-48f6-9247-03bdf36c6e92@kernel.org>
Date: Fri, 29 Aug 2025 12:37:50 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
Florian Fainelli <florian.fainelli@...adcom.com>
Cc: linux-mips@...r.kernel.org, Rob Herring <robh@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Broadcom internal kernel review list
<bcm-kernel-feedback-list@...adcom.com>,
"open list:MEMORY CONTROLLER DRIVERS" <linux-kernel@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
"moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 0/2] brcmstb-memc-ddr binding updates for MIPS boards
On 29/08/2025 12:21, Thomas Bogendoerfer wrote:
> On Tue, Jul 29, 2025 at 01:52:11PM -0700, Florian Fainelli wrote:
>> This patch series updates the MIPS-based Broadcom STB chips to use a
>> proper compatible string for their memory controller node(s) after
>> 501be7cecec9 ("dt-bindings: memory-controller: Define fallback
>> compatible").
>>
>> Florian Fainelli (2):
>> dt-bindings: memory: Update brcmstb-memc-ddr binding with older chips
>> MIPS: BMIPS: Properly define memory controller compatible
>>
>> .../bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml | 4 ++++
>> arch/mips/boot/dts/brcm/bcm7346.dtsi | 3 ++-
>> arch/mips/boot/dts/brcm/bcm7360.dtsi | 3 ++-
>> arch/mips/boot/dts/brcm/bcm7362.dtsi | 3 ++-
>> arch/mips/boot/dts/brcm/bcm7425.dtsi | 6 ++++--
>> arch/mips/boot/dts/brcm/bcm7435.dtsi | 6 ++++--
>> 6 files changed, 18 insertions(+), 7 deletions(-)
>
> series applied to mips-next.
Why entire series? You were notified two weeks ago that I already took
the driver subsystem patch.
Best regards,
Krzysztof
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