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Message-ID: <3eykohfvqgkbvwirzx63bx65d5uv774gib65bcyjlpphrssfjp@74bqakxvnkmh>
Date: Sat, 30 Aug 2025 08:51:51 +0530
From: Manivannan Sadhasivam <mani@...nel.org>
To: Shradha Todi <shradha.t@...sung.com>
Cc: 'Krzysztof Kozlowski' <krzk@...nel.org>, linux-pci@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org, linux-phy@...ts.infradead.org,
lpieralisi@...nel.org, kwilczynski@...nel.org, robh@...nel.org, bhelgaas@...gle.com,
jingoohan1@...il.com, krzk+dt@...nel.org, conor+dt@...nel.org, alim.akhtar@...sung.com,
vkoul@...nel.org, kishon@...nel.org, arnd@...db.de, m.szyprowski@...sung.com,
jh80.chung@...sung.com, pankaj.dubey@...sung.com
Subject: Re: [PATCH v3 07/12] dt-bindings: PCI: Add support for Tesla FSD SoC
On Mon, Aug 18, 2025 at 02:16:16PM GMT, Shradha Todi wrote:
> > > +
> > > + phys:
> > > + maxItems: 1
> > > +
> > > + samsung,syscon-pcie:
> > > + $ref: /schemas/types.yaml#/definitions/phandle-array
> > > + description: phandle for system control registers, used to
> > > + control signals at system level
> >
> > What is "system level"? and what are these "signals" being controlled?
> >
>
> I will add a more detailed description for why the syscon is being used
>
> >
> > > +title: Tesla FSD SoC series PCIe Host Controller
> > > +
> > > +maintainers:
> > > + - Shradha Todi <shradha.t@...sung.com>
> > > +
> > > +description:
> > > + Tesla FSD SoCs PCIe host controller inherits all the common
> > > + properties defined in samsung,exynos-pcie.yaml
> > > +
> > > +allOf:
> > > + - $ref: /schemas/pci/samsung,exynos-pcie.yaml#
> > > +
> > > +properties:
> > > + compatible:
> > > + const: tesla,fsd-pcie
> > > +
> > > + clocks:
> > > + maxItems: 4
> > > +
> > > + clock-names:
> > > + items:
> > > + - const: aux
> > > + - const: dbi
> > > + - const: mstr
> > > + - const: slv
> > > +
> > > + num-lanes:
> > > + maximum: 4
> > > +
> > > + samsung,syscon-pcie:
> > > + $ref: /schemas/types.yaml#/definitions/phandle-array
> > > + description: phandle for system control registers, used to
> > > + control signals at system level
> > > +
> > > +required:
> > > + - samsung,syscon-pcie
> >
> > clocks are required, compatible as well.
> >
>
> Since this was inheriting the common exynos yaml file and that had these properties
> under required, I did not mention again. Will take care in next version.
>
dma-coherent needs to be a required property as well since this binding is
supporting only one controller, that seem to have cache coherent DMA.
> > Missing supplies, both as properties and required. PCI devices do not
> > work without power.
> >
>
> According to the HW design of FSD SoC, the control to manage PCIe power is given to
> a separate CPU where custom firmware runs. Therefore, the Linux side does not control
> the PCIe power supplies directly and are hence not included in the device tree.
What do you mean by 'PCIe power'? Supply to the PCIe controller/bus or the
devices connected to the bus?
- Mani
--
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