linux-kernel - [PATCH 03/15] Documentation: iio: ad4030: Add double PWM SPI offload doc

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Message-ID: <4425996699ceca9fa909bdad86b41abe8b25aad4.1756511030.git.marcelo.schmitt@analog.com>
Date: Fri, 29 Aug 2025 21:41:14 -0300
From: Marcelo Schmitt <marcelo.schmitt@...log.com>
To: <linux-iio@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-doc@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-spi@...r.kernel.org>
CC: <jic23@...nel.org>, <Michael.Hennerich@...log.com>, <nuno.sa@...log.com>,
        <eblanc@...libre.com>, <dlechner@...libre.com>, <andy@...nel.org>,
        <corbet@....net>, <robh@...nel.org>, <krzk+dt@...nel.org>,
        <conor+dt@...nel.org>, <broonie@...nel.org>,
        <Jonathan.Cameron@...wei.com>, <andriy.shevchenko@...ux.intel.com>,
        <ahaslam@...libre.com>, <marcelo.schmitt1@...il.com>
Subject: [PATCH 03/15] Documentation: iio: ad4030: Add double PWM SPI offload doc

Document double PWM setup SPI offload wiring schema.

Signed-off-by: Marcelo Schmitt <marcelo.schmitt@...log.com>
---
 Documentation/iio/ad4030.rst | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/Documentation/iio/ad4030.rst b/Documentation/iio/ad4030.rst
index b57424b650a8..dc3ac253ef66 100644
--- a/Documentation/iio/ad4030.rst
+++ b/Documentation/iio/ad4030.rst
@@ -92,6 +92,35 @@ Interleaved mode
 In this mode, both channels conversion results are bit interleaved one SDO line.
 As such the wiring is the same as `One lane mode`_.
 
+SPI offload wiring
+^^^^^^^^^^^^^^^^^^
+
+.. code-block::
+
+    +-------------+         +-------------+
+    |         CNV |<-----+--| GPIO        |
+    |             |      +--| PWM1        |
+    |             |         |             |
+    |             |      +--| PWM0        |
+    |             |      |  +-------------+
+    |             |      +->| TRIGGER     |
+    |          CS |<--------| CS          |
+    |             |         |             |
+    |     ADC     |         |     SPI     |
+    |             |         |             |
+    |         SDI |<--------| SDO         |
+    |         SDO |-------->| SDI         |
+    |        SCLK |<--------| SCLK        |
+    +-------------+         +-------------+
+
+In this mode, both the ``cnv-gpios`` and a ``pwms`` properties are required.
+The ``pwms`` property specifies the PWM that is connected to the ADC CNV pin.
+The SPI offload will have a ``trigger-sources`` property to indicate the SPI
+offload (PWM) trigger source. The IIO device driver synchronizes the PWMs to do
+ADC transfer zone 2 data capture.
+
+.. seealso:: `SPI offload support`_
+
 SPI Clock mode
 --------------
 
-- 
2.39.2