| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <20250830-s3c-cleanup-adc-v1-1-de54dfb1d9ea@linaro.org>
Date: Sat, 30 Aug 2025 13:09:38 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Jonathan Cameron <jic23@...nel.org>,
David Lechner <dlechner@...libre.com>,
Nuno Sá <nuno.sa@...log.com>,
Andy Shevchenko <andy@...nel.org>, Krzysztof Kozlowski <krzk@...nel.org>,
Alim Akhtar <alim.akhtar@...sung.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-iio@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: [PATCH 1/5] iio: adc: exynos_adc: Drop S3C2410 support
Samsung S3C24xx family of SoCs was removed from the Linux kernel in the
commit 61b7f8920b17 ("ARM: s3c: remove all s3c24xx support"), in January
2023. There are no in-kernel users of its compatibles.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
---
drivers/iio/adc/exynos_adc.c | 75 +-------------------------------------------
1 file changed, 1 insertion(+), 74 deletions(-)
diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c
index 4614cf848535944a41e0ab19f35c5ca0546000c0..17fd33c6bd6d0dcf41771331ecb328e58d820ed0 100644
--- a/drivers/iio/adc/exynos_adc.c
+++ b/drivers/iio/adc/exynos_adc.c
@@ -44,9 +44,6 @@
#define ADC_V1_MUX(x) ((x) + 0x1c)
#define ADC_V1_CLRINTPNDNUP(x) ((x) + 0x20)
-/* S3C2410 ADC registers definitions */
-#define ADC_S3C2410_MUX(x) ((x) + 0x18)
-
/* Future ADC_V2 registers definitions */
#define ADC_V2_CON1(x) ((x) + 0x00)
#define ADC_V2_CON2(x) ((x) + 0x04)
@@ -61,10 +58,8 @@
#define ADC_V1_CON_PRSCLV(x) (((x) & 0xFF) << 6)
#define ADC_V1_CON_STANDBY (1u << 2)
-/* Bit definitions for S3C2410 ADC */
+/* Bit definitions for S3C2410 / S3C6410 ADC */
#define ADC_S3C2410_CON_SELMUX(x) (((x) & 7) << 3)
-#define ADC_S3C2410_DATX_MASK 0x3FF
-#define ADC_S3C2416_CON_RES_SEL (1u << 3)
/* touch screen always uses channel 0 */
#define ADC_S3C2410_MUX_TS 0
@@ -307,53 +302,6 @@ static const struct exynos_adc_data exynos_adc_s5pv210_data = {
.start_conv = exynos_adc_v1_start_conv,
};
-static void exynos_adc_s3c2416_start_conv(struct exynos_adc *info,
- unsigned long addr)
-{
- u32 con1;
-
- /* Enable 12 bit ADC resolution */
- con1 = readl(ADC_V1_CON(info->regs));
- con1 |= ADC_S3C2416_CON_RES_SEL;
- writel(con1, ADC_V1_CON(info->regs));
-
- /* Select channel for S3C2416 */
- writel(addr, ADC_S3C2410_MUX(info->regs));
-
- con1 = readl(ADC_V1_CON(info->regs));
- writel(con1 | ADC_CON_EN_START, ADC_V1_CON(info->regs));
-}
-
-static struct exynos_adc_data const exynos_adc_s3c2416_data = {
- .num_channels = MAX_ADC_V1_CHANNELS,
- .mask = ADC_DATX_MASK, /* 12 bit ADC resolution */
-
- .init_hw = exynos_adc_v1_init_hw,
- .exit_hw = exynos_adc_v1_exit_hw,
- .start_conv = exynos_adc_s3c2416_start_conv,
-};
-
-static void exynos_adc_s3c2443_start_conv(struct exynos_adc *info,
- unsigned long addr)
-{
- u32 con1;
-
- /* Select channel for S3C2433 */
- writel(addr, ADC_S3C2410_MUX(info->regs));
-
- con1 = readl(ADC_V1_CON(info->regs));
- writel(con1 | ADC_CON_EN_START, ADC_V1_CON(info->regs));
-}
-
-static struct exynos_adc_data const exynos_adc_s3c2443_data = {
- .num_channels = MAX_ADC_V1_CHANNELS,
- .mask = ADC_S3C2410_DATX_MASK, /* 10 bit ADC resolution */
-
- .init_hw = exynos_adc_v1_init_hw,
- .exit_hw = exynos_adc_v1_exit_hw,
- .start_conv = exynos_adc_s3c2443_start_conv,
-};
-
static void exynos_adc_s3c64xx_start_conv(struct exynos_adc *info,
unsigned long addr)
{
@@ -365,15 +313,6 @@ static void exynos_adc_s3c64xx_start_conv(struct exynos_adc *info,
writel(con1 | ADC_CON_EN_START, ADC_V1_CON(info->regs));
}
-static struct exynos_adc_data const exynos_adc_s3c24xx_data = {
- .num_channels = MAX_ADC_V1_CHANNELS,
- .mask = ADC_S3C2410_DATX_MASK, /* 10 bit ADC resolution */
-
- .init_hw = exynos_adc_v1_init_hw,
- .exit_hw = exynos_adc_v1_exit_hw,
- .start_conv = exynos_adc_s3c64xx_start_conv,
-};
-
static struct exynos_adc_data const exynos_adc_s3c64xx_data = {
.num_channels = MAX_ADC_V1_CHANNELS,
.mask = ADC_DATX_MASK, /* 12 bit ADC resolution */
@@ -486,18 +425,6 @@ static const struct exynos_adc_data exynos7_adc_data = {
static const struct of_device_id exynos_adc_match[] = {
{
- .compatible = "samsung,s3c2410-adc",
- .data = &exynos_adc_s3c24xx_data,
- }, {
- .compatible = "samsung,s3c2416-adc",
- .data = &exynos_adc_s3c2416_data,
- }, {
- .compatible = "samsung,s3c2440-adc",
- .data = &exynos_adc_s3c24xx_data,
- }, {
- .compatible = "samsung,s3c2443-adc",
- .data = &exynos_adc_s3c2443_data,
- }, {
.compatible = "samsung,s3c6410-adc",
.data = &exynos_adc_s3c64xx_data,
}, {
--
2.48.1
Powered by blists - more mailing lists