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Message-ID: <344c3797fe8e5aa9177ef8c0633d1eedd32563fa.1756511030.git.marcelo.schmitt@analog.com>
Date: Fri, 29 Aug 2025 21:44:20 -0300
From: Marcelo Schmitt <marcelo.schmitt@...log.com>
To: <linux-iio@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-doc@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-spi@...r.kernel.org>
CC: <jic23@...nel.org>, <Michael.Hennerich@...log.com>, <nuno.sa@...log.com>,
        <eblanc@...libre.com>, <dlechner@...libre.com>, <andy@...nel.org>,
        <corbet@....net>, <robh@...nel.org>, <krzk+dt@...nel.org>,
        <conor+dt@...nel.org>, <broonie@...nel.org>,
        <Jonathan.Cameron@...wei.com>, <andriy.shevchenko@...ux.intel.com>,
        <ahaslam@...libre.com>, <sergiu.cuciurean@...log.com>,
        <marcelo.schmitt1@...il.com>
Subject: [PATCH 11/15] iio: adc: ad4030: Add clock mode option parse and setup

AD4030 series of ADCs support three different options for the clock that
frames data output. Since each clock option implies a different hardware
setup, the clock mode to use is specified in firmware. Read the designated
clock option from firmware and configure the device to work accordingly.

Co-developed-by: Sergiu Cuciurean <sergiu.cuciurean@...log.com>
Signed-off-by: Sergiu Cuciurean <sergiu.cuciurean@...log.com>
Signed-off-by: Marcelo Schmitt <marcelo.schmitt@...log.com>
---
 drivers/iio/adc/ad4030.c | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/drivers/iio/adc/ad4030.c b/drivers/iio/adc/ad4030.c
index e6c1c9be1632..a5931056936a 100644
--- a/drivers/iio/adc/ad4030.c
+++ b/drivers/iio/adc/ad4030.c
@@ -74,6 +74,7 @@
 	(AD4030_REG_GAIN_X0_MSB + (AD4030_REG_GAIN_BYTES_NB * (ch)))
 #define AD4030_REG_MODES			0x20
 #define     AD4030_REG_MODES_MASK_OUT_DATA_MODE	GENMASK(2, 0)
+#define     AD4030_REG_MODES_MASK_CLOCK_MODE	GENMASK(5, 4)
 #define     AD4030_REG_MODES_MASK_LANE_MODE	GENMASK(7, 6)
 #define AD4030_REG_OSCILATOR			0x21
 #define AD4030_REG_IO				0x22
@@ -127,6 +128,12 @@ enum ad4030_out_mode {
 	AD4030_OUT_DATA_MD_32_PATTERN,
 };
 
+enum ad4030_clock_mode {
+	AD4030_SPI_CLOCK_MODE,
+	AD4030_ECHO_CLOCK_MODE,
+	AD4030_CLOCK_HOST_MODE,
+};
+
 enum ad4030_lane_mode {
 	AD4030_LANE_MD_1_PER_CH,
 	AD4030_LANE_MD_2_PER_CH,
@@ -167,6 +174,7 @@ struct ad4030_state {
 	unsigned int avg_log2;
 	enum ad4030_out_mode mode;
 	enum ad4030_lane_mode lane_mode;
+	enum ad4030_clock_mode clock_mode;
 	/* offload sampling spi message */
 	struct spi_transfer offload_xfer;
 	struct spi_message offload_msg;
@@ -263,6 +271,12 @@ static const int ad4030_rx_bus_width[] = {
 	1, 2, 4, 8,
 };
 
+static const char * const ad4030_clock_mode_str[] = {
+	[AD4030_SPI_CLOCK_MODE] = "spi",
+	[AD4030_ECHO_CLOCK_MODE] = "echo",
+	[AD4030_CLOCK_HOST_MODE] = "host",
+};
+
 static const int ad4030_average_modes[] = {
 	1, 2, 4, 8, 16, 32, 64, 128,
 	256, 512, 1024, 2048, 4096, 8192, 16384, 32768,
@@ -1249,6 +1263,14 @@ static int ad4030_config(struct ad4030_state *st)
 
 	reg_modes = FIELD_PREP(AD4030_REG_MODES_MASK_LANE_MODE, st->lane_mode);
 
+	/* Optional data clock mode */
+	ret = device_property_match_property_string(dev, "adi,clock-mode",
+						    ad4030_clock_mode_str,
+						    ARRAY_SIZE(ad4030_clock_mode_str));
+	/* Default to SPI clock mode. */
+	reg_modes |= FIELD_PREP(AD4030_REG_MODES_MASK_CLOCK_MODE,
+				ret >= 0 ? ret : AD4030_SPI_CLOCK_MODE);
+
 	ret = regmap_write(st->regmap, AD4030_REG_MODES, reg_modes);
 	if (ret)
 		return ret;
-- 
2.39.2


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