linux-kernel - Re: [PATCH 0/3] Support GPIO controller of Loongson 2K0300 SoC

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Message-ID: <CAMRc=Meed_x_OODv1fw1m7rpLY4uGic=0pacjV+Mj147_WMZPg@mail.gmail.com>
Date: Sat, 30 Aug 2025 21:49:46 +0200
From: Bartosz Golaszewski <brgl@...ev.pl>
To: Yao Zi <ziyao@...root.org>
Cc: Yinbo Zhu <zhuyinbo@...ngson.cn>, Linus Walleij <linus.walleij@...aro.org>, 
	Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Huacai Chen <chenhuacai@...nel.org>, WANG Xuerui <kernel@...0n.name>, 
	Philipp Zabel <p.zabel@...gutronix.de>, linux-gpio@...r.kernel.org, 
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
	loongarch@...ts.linux.dev, Mingcong Bai <jeffbai@...c.io>, 
	Kexy Biscuit <kexybiscuit@...c.io>
Subject: Re: [PATCH 0/3] Support GPIO controller of Loongson 2K0300 SoC

On Sat, Aug 16, 2025 at 5:50 AM Yao Zi <ziyao@...root.org> wrote:
>
> This series adds support for Loongson 2K0300's GPIO controller. While
> being mostly identical to previous implementation, its interrupt
> functionality hasn't been implemented in gpio-loongson-64bit.c. PATCH 2
> implements its interrupt support with an IRQCHIP, and the code could be
> reused for other Loongson SoCs with similar interrupt functionality like
> 2K1500 and 2K2000.
>
> Tested on CTCISZ Forever Pi, reading/writing GPIOs works correctly, and
> both level and edge interrupts could be triggered.
>
> The devicetree patch depends on series "Support reset controller of
> Loongson 2K0300 SoC"[1] for a clean apply. Thanks for your time and review.
>
> [1]: https://lore.kernel.org/all/20250816033327.11359-2-ziyao@disroot.org/
>

Hi!

This doesn't apply on top of current gpio/for-next. Can you please
rebase and resend?

Bart