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Message-ID: <20250831101418.GAaLQgepm-XMwE4n7x@fat_crate.local>
Date: Sun, 31 Aug 2025 12:14:18 +0200
From: Borislav Petkov <bp@...en8.de>
To: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: x86-ml <x86@...nel.org>, lkml <linux-kernel@...r.kernel.org>
Subject: [GIT PULL] x86/urgent for v6.17-rc4
Hi Linus,
please pull the x86/urgent lineup for v6.17-rc4.
Thx.
---
The following changes since commit 1b237f190eb3d36f52dffe07a40b5eb210280e00:
Linux 6.17-rc3 (2025-08-24 12:04:12 -0400)
are available in the Git repository at:
ssh://git@...olite.kernel.org/pub/scm/linux/kernel/git/tip/tip tags/x86_urgent_for_v6.17_rc4
for you to fetch changes up to 8b3641dfb6f902407495c63b9b64482b32319b66:
x86/bugs: Add attack vector controls for SSB (2025-08-27 18:17:12 +0200)
----------------------------------------------------------------
- Convert the SSB mitigation to the attack vector controls which got forgotten
at the time
- Prevent the CPUID topology hierarchy detection on AMD from overwriting the
correct initial APIC ID
- Fix the case of a machine shipping without microcode in the BIOS, in the AMD
microcode loader
- Correct the Pentium 4 model range which has a constant TSC
----------------------------------------------------------------
Borislav Petkov (AMD) (1):
x86/microcode/AMD: Handle the case of no BIOS microcode
David Kaplan (1):
x86/bugs: Add attack vector controls for SSB
K Prateek Nayak (1):
x86/cpu/topology: Use initial APIC ID from XTOPOLOGY leaf on AMD/HYGON
Suchit Karunakaran (1):
x86/cpu/intel: Fix the constant_tsc model check for Pentium 4
.../admin-guide/hw-vuln/attack_vector_controls.rst | 5 +----
arch/x86/kernel/cpu/bugs.c | 9 +++++++++
arch/x86/kernel/cpu/intel.c | 2 +-
arch/x86/kernel/cpu/microcode/amd.c | 22 +++++++++++++++++++--
arch/x86/kernel/cpu/topology_amd.c | 23 +++++++++++++---------
5 files changed, 45 insertions(+), 16 deletions(-)
--
Regards/Gruss,
Boris.
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