linux-kernel - Re: (subset) [PATCH v3 02/10] clk: samsung: Add clock PLL support for ARTPEC-8 SoC

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Message-Id: <175664689125.195158.15680456692339310248.b4-ty@linaro.org>
Date: Sun, 31 Aug 2025 15:28:11 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: jesper.nilsson@...s.com, mturquette@...libre.com, sboyd@...nel.org, 
 robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org, krzk@...nel.org, 
 s.nawrocki@...sung.com, cw00.choi@...sung.com, alim.akhtar@...sung.com, 
 linus.walleij@...aro.org, tomasz.figa@...il.com, catalin.marinas@....com, 
 will@...nel.org, arnd@...db.de, Ravi Patel <ravi.patel@...sung.com>
Cc: ksk4725@...sia.com, kenkim@...sia.com, pjsin865@...sia.com, 
 gwk1013@...sia.com, hgkim05@...sia.com, mingyoungbo@...sia.com, 
 smn1196@...sia.com, pankaj.dubey@...sung.com, shradha.t@...sung.com, 
 inbaraj.e@...sung.com, swathi.ks@...sung.com, hrishikesh.d@...sung.com, 
 dj76.yang@...sung.com, hypmean.kim@...sung.com, 
 linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, 
 linux-samsung-soc@...r.kernel.org, linux-arm-kernel@...s.com, 
 linux-clk@...r.kernel.org, devicetree@...r.kernel.org, 
 linux-gpio@...r.kernel.org, soc@...ts.linux.dev
Subject: Re: (subset) [PATCH v3 02/10] clk: samsung: Add clock PLL support
 for ARTPEC-8 SoC


On Mon, 25 Aug 2025 17:14:28 +0530, Ravi Patel wrote:
> Add below clock PLL support for Axis ARTPEC-8 SoC platform:
> - pll_1017x: Integer PLL with mid frequency FVCO (950 to 2400 MHz)
>              This is used in ARTPEC-8 SoC for shared PLL
> 
> - pll_1031x: Integer/Fractional PLL with mid frequency FVCO
>              (600 to 1200 MHz)
>              This is used in ARTPEC-8 SoC for Audio PLL
> 
> [...]

Applied, thanks!

[02/10] clk: samsung: Add clock PLL support for ARTPEC-8 SoC
        https://git.kernel.org/krzk/linux/c/80770fccb7f60b0bc795852c154273e511f296a0

Best regards,
-- 
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>