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Message-ID: <20250901170418.4314-4-kprateek.nayak@amd.com>
Date: Mon, 1 Sep 2025 17:04:17 +0000
From: K Prateek Nayak <kprateek.nayak@....com>
To: Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>,
Borislav Petkov <bp@...en8.de>, Dave Hansen <dave.hansen@...ux.intel.com>,
Sean Christopherson <seanjc@...gle.com>, Paolo Bonzini <pbonzini@...hat.com>,
Jonathan Corbet <corbet@....net>, <x86@...nel.org>
CC: Naveen rao <naveen.rao@....com>, Sairaj Kodilkar <sarunkod@....com>, "H.
Peter Anvin" <hpa@...or.com>, "Peter Zijlstra (Intel)"
<peterz@...radead.org>, "Xin Li (Intel)" <xin@...or.com>, Pawan Gupta
<pawan.kumar.gupta@...ux.intel.com>, <linux-kernel@...r.kernel.org>,
<kvm@...r.kernel.org>, Mario Limonciello <mario.limonciello@....com>,
"Gautham R. Shenoy" <gautham.shenoy@....com>, Babu Moger
<babu.moger@....com>, Suravee Suthikulpanit <suravee.suthikulpanit@....com>,
K Prateek Nayak <kprateek.nayak@....com>
Subject: [PATCH v5 3/4] x86/msr-index: Define AMD64_CPUID_FN_EXT MSR
Explicitly define the AMD64_CPUID_FN_EXT MSR used to toggle the extended
features. Also define and use the bits necessary for an old TOPOEXT
fixup on AMD Family 0x15 processors.
No functional changes intended.
Signed-off-by: K Prateek Nayak <kprateek.nayak@....com>
---
Changelog v4..v5:
o No changes.
---
arch/x86/include/asm/msr-index.h | 5 +++++
arch/x86/kernel/cpu/topology_amd.c | 7 ++++---
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index f627196eb796..176ca7040139 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -633,6 +633,11 @@
#define MSR_AMD_PPIN 0xc00102f1
#define MSR_AMD64_CPUID_FN_7 0xc0011002
#define MSR_AMD64_CPUID_FN_1 0xc0011004
+
+#define MSR_AMD64_CPUID_FN_EXT 0xc0011005
+#define MSR_AMD64_CPUID_FN_EXT_TOPOEXT_ENABLED_BIT 54
+#define MSR_AMD64_CPUID_FN_EXT_TOPOEXT_ENABLED BIT_ULL(MSR_AMD64_CPUID_FN_EXT_TOPOEXT_ENABLED_BIT)
+
#define MSR_AMD64_LS_CFG 0xc0011020
#define MSR_AMD64_DC_CFG 0xc0011022
#define MSR_AMD64_TW_CFG 0xc0011023
diff --git a/arch/x86/kernel/cpu/topology_amd.c b/arch/x86/kernel/cpu/topology_amd.c
index 7ebd4a15c561..07510647a378 100644
--- a/arch/x86/kernel/cpu/topology_amd.c
+++ b/arch/x86/kernel/cpu/topology_amd.c
@@ -163,11 +163,12 @@ static void topoext_fixup(struct topo_scan *tscan)
c->x86 != 0x15 || c->x86_model < 0x10 || c->x86_model > 0x6f)
return;
- if (msr_set_bit(0xc0011005, 54) <= 0)
+ if (msr_set_bit(MSR_AMD64_CPUID_FN_EXT,
+ MSR_AMD64_CPUID_FN_EXT_TOPOEXT_ENABLED_BIT) <= 0)
return;
- rdmsrq(0xc0011005, msrval);
- if (msrval & BIT_64(54)) {
+ rdmsrq(MSR_AMD64_CPUID_FN_EXT, msrval);
+ if (msrval & MSR_AMD64_CPUID_FN_EXT_TOPOEXT_ENABLED) {
set_cpu_cap(c, X86_FEATURE_TOPOEXT);
pr_info_once(FW_INFO "CPU: Re-enabling disabled Topology Extensions Support.\n");
}
--
2.34.1
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