[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <451f147b-a193-44e3-b7ca-90136de31a17@kernel.org>
Date: Mon, 1 Sep 2025 13:45:08 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Jacky Chou <jacky_chou@...eedtech.com>, linux-pci@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
bhelgaas@...gle.com, lpieralisi@...nel.org, kwilczynski@...nel.org,
mani@...nel.org, robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
joel@....id.au, andrew@...econstruct.com.au, vkoul@...nel.org,
kishon@...nel.org, linus.walleij@...aro.org, p.zabel@...gutronix.de,
linux-aspeed@...ts.ozlabs.org, linux-arm-kernel@...ts.infradead.org,
linux-phy@...ts.infradead.org, openbmc@...ts.ozlabs.org,
linux-gpio@...r.kernel.org
Subject: Re: [PATCH v3 01/10] dt-bindings: soc: aspeed: Add ASPEED PCIe Config
On 01/09/2025 07:59, Jacky Chou wrote:
> +description:
> + The ASPEED PCIe configuration syscon block provides a set of registers shared
> + by multiple PCIe-related devices within the SoC. This node represents the
> + common configuration space that allows these devices to coordinate and manage
> + shared PCIe settings, including address mapping, control, and status
> + registers. The syscon interface enables for various PCIe devices to access
> + and modify these shared registers in a consistent and centralized manner.
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - aspeed,ast2700-pcie-cfg
Why this cannot be part of standard syscon binding file?
> + - const: syscon
> +
> + reg:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + soc0 {
soc {
although why do you need it in the first place...
> + #address-cells = <2>;
> + #size-cells = <1>;
> +
> + syscon@...02a00 {
> + compatible = "aspeed,ast2700-pcie-cfg", "syscon";
> + reg = <0 0x12c02a00 0x80>;
> + };
> + };
Best regards,
Krzysztof
Powered by blists - more mailing lists