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Message-ID: <9e3e8bc6-25ca-44fd-86fe-949205b0f078@oss.qualcomm.com>
Date: Tue, 2 Sep 2025 18:12:42 +0530
From: Umang Chheda <umang.chheda@....qualcomm.com>
To: Bjorn Andersson <andersson@...nel.org>
Cc: Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley
<conor+dt@...nel.org>,
Richard Cochran <richardcochran@...il.com>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Rakesh Kota <rakesh.kota@....qualcomm.com>,
Nirmesh Kumar Singh <quic_nkumarsi@...cinc.com>,
Viken Dadhaniya <viken.dadhaniya@....qualcomm.com>,
Mohd Ayaan Anwar <quic_mohdayaa@...cinc.com>,
Arun Khannna <quic_arkhanna@...cinc.com>,
Monish Chunara <quic_mchunara@...cinc.com>,
Vikash Garodia <quic_vgarodia@...cinc.com>,
Swati Agarwal <swati.agarwal@....qualcomm.com>
Subject: Re: [PATCH v3 2/2] arm64: dts: qcom: Add Monaco EVK initial board
support
Hi Bjorn,
On 8/27/2025 11:28 PM, Bjorn Andersson wrote:
> On Tue, Aug 26, 2025 at 11:45:06PM +0530, Umang Chheda wrote:
>
> Please add "qcs8300: " to the prefix and drop the words "initial" and
> "support" from subject.
>
>> Add initial device tree support for Monaco EVK board, based on
>> Qualcomm's QCS8300 SoC.
>
> Drop this sentence and embed the useful information in the next
> paragraph, which introduces us to the purpose of the patch.
>
> "Monaco EVK is a single board computer, based on the Qualcomm QCS8300
> SoC, with the following features:"
>>
Ack.
>> Monaco EVK is single board supporting these peripherals:
>> - Storage: 1 × 128 GB UFS, micro-SD card, EEPROMs for MACs,
>> and eMMC.
>> - Audio/Video, Camera & Display ports.
>> - Connectivity: RJ45 2.5GbE, WLAN/Bluetooth, CAN/CAN-FD.
>> - PCIe ports.
>> - USB & UART ports.
>>
>> On top of Monaco EVK board additional mezzanine boards can be
>> stacked in future.
>>
>> Add support for the following components :
>> - GPI (Generic Peripheral Interface) and QUPv3-0/1
>> controllers to facilitate DMA and peripheral communication.
>> - TCA9534 I/O expander via I2C to provide 8 additional GPIO
>> lines for extended I/O functionality.
>> - USB1 controller in device mode to support USB peripheral
>> operations.
>> - Remoteproc subsystems for supported DSPs such as Audio DSP,
>> Compute DSP and Generic DSP, along with their corresponding
>> firmware.
>> - Configure nvmem-layout on the I2C EEPROM to store data for Ethernet
>> and other consumers.
>> - QCA8081 2.5G Ethernet PHY on port-0 and expose the
>> Ethernet MAC address via nvmem for network configuration.
>> It depends on CONFIG_QCA808X_PHY to use QCA8081 PHY.
>> - Support for the Iris video decoder, including the required
>> firmware, to enable video decoding capabilities.
>>
>> Co-developed-by: Rakesh Kota <rakesh.kota@....qualcomm.com>
>> Signed-off-by: Rakesh Kota <rakesh.kota@....qualcomm.com>
>> Co-developed-by: Nirmesh Kumar Singh <quic_nkumarsi@...cinc.com>
>> Signed-off-by: Nirmesh Kumar Singh <quic_nkumarsi@...cinc.com>
>> Co-developed-by: Viken Dadhaniya <viken.dadhaniya@....qualcomm.com>
>> Signed-off-by: Viken Dadhaniya <viken.dadhaniya@....qualcomm.com>
>> Co-developed-by: Mohd Ayaan Anwar <quic_mohdayaa@...cinc.com>
>> Signed-off-by: Mohd Ayaan Anwar <quic_mohdayaa@...cinc.com>
>> Co-developed-by: Arun Khannna <quic_arkhanna@...cinc.com>
>> Signed-off-by: Arun Khannna <quic_arkhanna@...cinc.com>
>> Co-developed-by: Monish Chunara <quic_mchunara@...cinc.com>
>> Signed-off-by: Monish Chunara <quic_mchunara@...cinc.com>
>> Co-developed-by: Vikash Garodia <quic_vgarodia@...cinc.com>
>> Signed-off-by: Vikash Garodia <quic_vgarodia@...cinc.com>
>> Co-developed-by: Swati Agarwal <swati.agarwal@....qualcomm.com>
>> Signed-off-by: Swati Agarwal <swati.agarwal@....qualcomm.com>
>> Signed-off-by: Umang Chheda <umang.chheda@....qualcomm.com>
>> ---
>> arch/arm64/boot/dts/qcom/Makefile | 1 +
>> arch/arm64/boot/dts/qcom/monaco-evk.dts | 463 ++++++++++++++++++++++++
>> 2 files changed, 464 insertions(+)
>> create mode 100644 arch/arm64/boot/dts/qcom/monaco-evk.dts
>>
>> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
>> index 94a84770b080..057a81ea04ed 100644
>> --- a/arch/arm64/boot/dts/qcom/Makefile
>> +++ b/arch/arm64/boot/dts/qcom/Makefile
>> @@ -30,6 +30,7 @@ dtb-$(CONFIG_ARCH_QCOM) += ipq9574-rdp449.dtb
>> dtb-$(CONFIG_ARCH_QCOM) += ipq9574-rdp453.dtb
>> dtb-$(CONFIG_ARCH_QCOM) += ipq9574-rdp454.dtb
>> dtb-$(CONFIG_ARCH_QCOM) += lemans-evk.dtb
>> +dtb-$(CONFIG_ARCH_QCOM) += monaco-evk.dtb
>> dtb-$(CONFIG_ARCH_QCOM) += msm8216-samsung-fortuna3g.dtb
>> dtb-$(CONFIG_ARCH_QCOM) += msm8916-acer-a1-724.dtb
>> dtb-$(CONFIG_ARCH_QCOM) += msm8916-alcatel-idol347.dtb
>> diff --git a/arch/arm64/boot/dts/qcom/monaco-evk.dts b/arch/arm64/boot/dts/qcom/monaco-evk.dts
>> new file mode 100644
>> index 000000000000..8d58e62f6c87
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/qcom/monaco-evk.dts
>> @@ -0,0 +1,463 @@
>> +// SPDX-License-Identifier: BSD-3-Clause
>> +/*
>> + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved.
>
> This is the wrong copyright statement.
Ack, will update this in next patch.
>
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include <dt-bindings/gpio/gpio.h>
>> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
>> +
>> +#include "qcs8300.dtsi"
>> +#include "qcs8300-pmics.dtsi"
>> +
>> +/ {
>> + model = "Qualcomm Technologies, Inc. Monaco EVK";
>> + compatible = "qcom,monaco-evk", "qcom,qcs8300";
>> +
>> + aliases {
>> + ethernet0 = ðernet0;
>> + i2c1 = &i2c1;
>> + serial0 = &uart7;
>> + };
>> +
>> + chosen {
>> + stdout-path = "serial0:115200n8";
>> + };
>> +};
>> +
>> +&apps_rsc {
>> + regulators-0 {
>> + compatible = "qcom,pmm8654au-rpmh-regulators";
>> + qcom,pmic-id = "a";
>> +
>> + vreg_l3a: ldo3 {
>> + regulator-name = "vreg_l3a";
>> + regulator-min-microvolt = <1200000>;
>> + regulator-max-microvolt = <1200000>;
>> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
>> + regulator-allow-set-load;
>> + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
>> + RPMH_REGULATOR_MODE_HPM>;
>
> Are you sure that all these should have LPM and HPM as allowed modes? I
> would have preferred HPM-only and then selectively enable LPM, to avoid
> issues when LPM is entered.
>
> Such as what happened in fba47ba8c8a8 ("arm64: dts: qcom: qcs615: Set
> LDO12A regulator to HPM to avoid boot hang")
>
Ack, we will enable only HPM mode for now, and enable LPM modes selectively
later after confirming LPM voting support from all the clients.
> Regards,
> Bjorn
>
Thanks,
Umang
>
>> + };
>> +
>> + vreg_l4a: ldo4 {
>> + regulator-name = "vreg_l4a";
>> + regulator-min-microvolt = <880000>;
>> + regulator-max-microvolt = <912000>;
>> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
>> + regulator-allow-set-load;
>> + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
>> + RPMH_REGULATOR_MODE_HPM>;
>> + };
>> +
>> + vreg_l5a: ldo5 {
>> + regulator-name = "vreg_l5a";
>> + regulator-min-microvolt = <1200000>;
>> + regulator-max-microvolt = <1200000>;
>> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
>> + regulator-allow-set-load;
>> + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
>> + RPMH_REGULATOR_MODE_HPM>;
>> + };
>> +
>> + vreg_l6a: ldo6 {
>> + regulator-name = "vreg_l6a";
>> + regulator-min-microvolt = <880000>;
>> + regulator-max-microvolt = <912000>;
>> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
>> + regulator-allow-set-load;
>> + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
>> + RPMH_REGULATOR_MODE_HPM>;
>> + };
>> +
>> + vreg_l7a: ldo7 {
>> + regulator-name = "vreg_l7a";
>> + regulator-min-microvolt = <880000>;
>> + regulator-max-microvolt = <912000>;
>> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
>> + regulator-allow-set-load;
>> + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
>> + RPMH_REGULATOR_MODE_HPM>;
>> + };
>> +
>> + vreg_l8a: ldo8 {
>> + regulator-name = "vreg_l8a";
>> + regulator-min-microvolt = <2504000>;
>> + regulator-max-microvolt = <2960000>;
>> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
>> + regulator-allow-set-load;
>> + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
>> + RPMH_REGULATOR_MODE_HPM>;
>> + };
>> +
>> + vreg_l9a: ldo9 {
>> + regulator-name = "vreg_l9a";
>> + regulator-min-microvolt = <2970000>;
>> + regulator-max-microvolt = <3072000>;
>> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
>> + regulator-allow-set-load;
>> + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
>> + RPMH_REGULATOR_MODE_HPM>;
>> + };
>> + };
>> +
>> + regulators-1 {
>> + compatible = "qcom,pmm8654au-rpmh-regulators";
>> + qcom,pmic-id = "c";
>> +
>> + vreg_s5c: smps5 {
>> + regulator-name = "vreg_s5c";
>> + regulator-min-microvolt = <1104000>;
>> + regulator-max-microvolt = <1104000>;
>> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
>> + };
>> +
>> + vreg_l1c: ldo1 {
>> + regulator-name = "vreg_l1c";
>> + regulator-min-microvolt = <300000>;
>> + regulator-max-microvolt = <512000>;
>> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
>> + regulator-allow-set-load;
>> + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
>> + RPMH_REGULATOR_MODE_HPM>;
>> + };
>> +
>> + vreg_l2c: ldo2 {
>> + regulator-name = "vreg_l2c";
>> + regulator-min-microvolt = <900000>;
>> + regulator-max-microvolt = <904000>;
>> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
>> + regulator-allow-set-load;
>> + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
>> + RPMH_REGULATOR_MODE_HPM>;
>> + };
>> +
>> + vreg_l4c: ldo4 {
>> + regulator-name = "vreg_l4c";
>> + regulator-min-microvolt = <1200000>;
>> + regulator-max-microvolt = <1200000>;
>> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
>> + regulator-allow-set-load;
>> + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
>> + RPMH_REGULATOR_MODE_HPM>;
>> + };
>> +
>> + vreg_l7c: ldo7 {
>> + regulator-name = "vreg_l7c";
>> + regulator-min-microvolt = <1800000>;
>> + regulator-max-microvolt = <1800000>;
>> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
>> + regulator-allow-set-load;
>> + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
>> + RPMH_REGULATOR_MODE_HPM>;
>> + };
>> +
>> + vreg_l8c: ldo8 {
>> + regulator-name = "vreg_l8c";
>> + regulator-min-microvolt = <1800000>;
>> + regulator-max-microvolt = <1800000>;
>> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
>> + regulator-allow-set-load;
>> + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
>> + RPMH_REGULATOR_MODE_HPM>;
>> + };
>> +
>> + vreg_l9c: ldo9 {
>> + regulator-name = "vreg_l9c";
>> + regulator-min-microvolt = <1800000>;
>> + regulator-max-microvolt = <1800000>;
>> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
>> + regulator-allow-set-load;
>> + regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
>> + RPMH_REGULATOR_MODE_HPM>;
>> + };
>> + };
>> +};
>> +
>> +ðernet0 {
>> + phy-mode = "2500base-x";
>> + phy-handle = <&hsgmii_phy0>;
>> +
>> + pinctrl-0 = <ðernet0_default>;
>> + pinctrl-names = "default";
>> +
>> + snps,mtl-rx-config = <&mtl_rx_setup>;
>> + snps,mtl-tx-config = <&mtl_tx_setup>;
>> + snps,ps-speed = <1000>;
>> + nvmem-cells = <&mac_addr0>;
>> + nvmem-cell-names = "mac-address";
>> +
>> + status = "okay";
>> +
>> + mdio {
>> + compatible = "snps,dwmac-mdio";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + hsgmii_phy0: ethernet-phy@1c {
>> + compatible = "ethernet-phy-id004d.d101";
>> + reg = <0x1c>;
>> + reset-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>;
>> + reset-assert-us = <11000>;
>> + reset-deassert-us = <70000>;
>> + };
>> + };
>> +
>> + mtl_rx_setup: rx-queues-config {
>> + snps,rx-queues-to-use = <4>;
>> + snps,rx-sched-sp;
>> +
>> + queue0 {
>> + snps,dcb-algorithm;
>> + snps,map-to-dma-channel = <0x0>;
>> + snps,route-up;
>> + snps,priority = <0x1>;
>> + };
>> +
>> + queue1 {
>> + snps,dcb-algorithm;
>> + snps,map-to-dma-channel = <0x1>;
>> + snps,route-ptp;
>> + };
>> +
>> + queue2 {
>> + snps,avb-algorithm;
>> + snps,map-to-dma-channel = <0x2>;
>> + snps,route-avcp;
>> + };
>> +
>> + queue3 {
>> + snps,avb-algorithm;
>> + snps,map-to-dma-channel = <0x3>;
>> + snps,priority = <0xc>;
>> + };
>> + };
>> +
>> + mtl_tx_setup: tx-queues-config {
>> + snps,tx-queues-to-use = <4>;
>> +
>> + queue0 {
>> + snps,dcb-algorithm;
>> + };
>> +
>> + queue1 {
>> + snps,dcb-algorithm;
>> + };
>> +
>> + queue2 {
>> + snps,avb-algorithm;
>> + snps,send_slope = <0x1000>;
>> + snps,idle_slope = <0x1000>;
>> + snps,high_credit = <0x3e800>;
>> + snps,low_credit = <0xffc18000>;
>> + };
>> +
>> + queue3 {
>> + snps,avb-algorithm;
>> + snps,send_slope = <0x1000>;
>> + snps,idle_slope = <0x1000>;
>> + snps,high_credit = <0x3e800>;
>> + snps,low_credit = <0xffc18000>;
>> + };
>> + };
>> +};
>> +
>> +&gpi_dma0 {
>> + status = "okay";
>> +};
>> +
>> +&gpi_dma1 {
>> + status = "okay";
>> +};
>> +
>> +&i2c1 {
>> + pinctrl-0 = <&qup_i2c1_default>;
>> + pinctrl-names = "default";
>> +
>> + status = "okay";
>> +
>> + eeprom0: eeprom@50 {
>> + compatible = "atmel,24c256";
>> + reg = <0x50>;
>> + pagesize = <64>;
>> +
>> + nvmem-layout {
>> + compatible = "fixed-layout";
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> +
>> + mac_addr0: mac-addr@0 {
>> + reg = <0x0 0x6>;
>> + };
>> + };
>> + };
>> +};
>> +
>> +&i2c15 {
>> + pinctrl-0 = <&qup_i2c15_default>;
>> + pinctrl-names = "default";
>> +
>> + status = "okay";
>> +
>> + expander0: pca953x@38 {
>> + compatible = "ti,tca9538";
>> + #gpio-cells = <2>;
>> + gpio-controller;
>> + reg = <0x38>;
>> + };
>> +
>> + expander1: pca953x@39 {
>> + compatible = "ti,tca9538";
>> + #gpio-cells = <2>;
>> + gpio-controller;
>> + reg = <0x39>;
>> + };
>> +
>> + expander2: pca953x@3a {
>> + compatible = "ti,tca9538";
>> + #gpio-cells = <2>;
>> + gpio-controller;
>> + reg = <0x3a>;
>> + };
>> +
>> + expander3: pca953x@3b {
>> + compatible = "ti,tca9538";
>> + #gpio-cells = <2>;
>> + gpio-controller;
>> + reg = <0x3b>;
>> + };
>> +
>> + expander4: pca953x@3c {
>> + compatible = "ti,tca9538";
>> + #gpio-cells = <2>;
>> + gpio-controller;
>> + reg = <0x3c>;
>> + };
>> +
>> + expander5: pca953x@3d {
>> + compatible = "ti,tca9538";
>> + #gpio-cells = <2>;
>> + gpio-controller;
>> + reg = <0x3d>;
>> + };
>> +
>> + expander6: pca953x@3e {
>> + compatible = "ti,tca9538";
>> + #gpio-cells = <2>;
>> + gpio-controller;
>> + reg = <0x3e>;
>> + };
>> +};
>> +
>> +&iris {
>> + status = "okay";
>> +};
>> +
>> +&qupv3_id_0 {
>> + status = "okay";
>> +};
>> +
>> +&qupv3_id_1 {
>> + status = "okay";
>> +};
>> +
>> +&remoteproc_adsp {
>> + firmware-name = "qcom/qcs8300/adsp.mbn";
>> +
>> + status = "okay";
>> +};
>> +
>> +&remoteproc_cdsp {
>> + firmware-name = "qcom/qcs8300/cdsp0.mbn";
>> +
>> + status = "okay";
>> +};
>> +
>> +&remoteproc_gpdsp {
>> + firmware-name = "qcom/qcs8300/gpdsp0.mbn";
>> +
>> + status = "okay";
>> +};
>> +
>> +&serdes0 {
>> + phy-supply = <&vreg_l4a>;
>> +
>> + status = "okay";
>> +};
>> +
>> +&tlmm {
>> + ethernet0_default: ethernet0-default-state {
>> + ethernet0_mdc: ethernet0-mdc-pins {
>> + pins = "gpio5";
>> + function = "emac0_mdc";
>> + drive-strength = <16>;
>> + bias-pull-up;
>> + };
>> +
>> + ethernet0_mdio: ethernet0-mdio-pins {
>> + pins = "gpio6";
>> + function = "emac0_mdio";
>> + drive-strength = <16>;
>> + bias-pull-up;
>> + };
>> + };
>> +
>> + qup_i2c1_default: qup-i2c1-state {
>> + pins = "gpio19", "gpio20";
>> + function = "qup0_se1";
>> + drive-strength = <2>;
>> + bias-pull-up;
>> + };
>> +
>> + qup_i2c15_default: qup-i2c15-state {
>> + pins = "gpio91", "gpio92";
>> + function = "qup1_se7";
>> + drive-strength = <2>;
>> + bias-pull-up;
>> + };
>> +};
>> +
>> +&uart7 {
>> + status = "okay";
>> +};
>> +
>> +&ufs_mem_hc {
>> + reset-gpios = <&tlmm 133 GPIO_ACTIVE_LOW>;
>> + vcc-supply = <&vreg_l8a>;
>> + vcc-max-microamp = <1100000>;
>> + vccq-supply = <&vreg_l4c>;
>> + vccq-max-microamp = <1200000>;
>> +
>> + status = "okay";
>> +};
>> +
>> +&ufs_mem_phy {
>> + vdda-phy-supply = <&vreg_l4a>;
>> + vdda-pll-supply = <&vreg_l5a>;
>> +
>> + status = "okay";
>> +};
>> +
>> +&usb_1 {
>> + status = "okay";
>> +};
>> +
>> +&usb_1_dwc3 {
>> + dr_mode = "peripheral";
>> +};
>> +
>> +&usb_1_hsphy {
>> + vdda-pll-supply = <&vreg_l7a>;
>> + vdda18-supply = <&vreg_l7c>;
>> + vdda33-supply = <&vreg_l9a>;
>> +
>> + status = "okay";
>> +};
>> +
>> +&usb_qmpphy {
>> + vdda-phy-supply = <&vreg_l7a>;
>> + vdda-pll-supply = <&vreg_l5a>;
>> +
>> + status = "okay";
>> +};
>> --
>> 2.34.1
>>
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