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Message-Id: <20250902042432.78960-3-luxu.kernel@bytedance.com>
Date: Tue, 2 Sep 2025 12:24:30 +0800
From: Xu Lu <luxu.kernel@...edance.com>
To: robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
paul.walmsley@...ive.com,
palmer@...belt.com,
aou@...s.berkeley.edu,
alex@...ti.fr,
ajones@...tanamicro.com,
brs@...osinc.com
Cc: devicetree@...r.kernel.org,
linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org,
apw@...onical.com,
joe@...ches.com,
Xu Lu <luxu.kernel@...edance.com>
Subject: [PATCH v2 2/4] dt-bindings: riscv: Add Zalasr ISA extension description
Add description for the Zalasr ISA extension
Signed-off-by: Xu Lu <luxu.kernel@...edance.com>
---
Documentation/devicetree/bindings/riscv/extensions.yaml | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml
index ede6a58ccf534..100fe53fb0731 100644
--- a/Documentation/devicetree/bindings/riscv/extensions.yaml
+++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
@@ -242,6 +242,11 @@ properties:
is supported as ratified at commit 5059e0ca641c ("update to
ratified") of the riscv-zacas.
+ - const: zalasr
+ description: |
+ The standard Zalasr extension for load-acquire/store-release as frozen
+ at commit 194f0094 ("Version 0.9 for freeze") of riscv-zalasr.
+
- const: zalrsc
description: |
The standard Zalrsc extension for load-reserved/store-conditional as
--
2.20.1
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