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Message-ID: <aLcLr8H3QbL_A565@debian-BULLSEYE-live-builder-AMD64>
Date: Tue, 2 Sep 2025 12:22:23 -0300
From: Marcelo Schmitt <marcelo.schmitt1@...il.com>
To: Andy Shevchenko <andy.shevchenko@...il.com>
Cc: Marcelo Schmitt <marcelo.schmitt@...log.com>, linux-iio@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-doc@...r.kernel.org,
devicetree@...r.kernel.org, linux-spi@...r.kernel.org,
jic23@...nel.org, Michael.Hennerich@...log.com, nuno.sa@...log.com,
eblanc@...libre.com, dlechner@...libre.com, andy@...nel.org,
corbet@....net, robh@...nel.org, krzk+dt@...nel.org,
conor+dt@...nel.org, broonie@...nel.org,
Jonathan.Cameron@...wei.com, andriy.shevchenko@...ux.intel.com,
ahaslam@...libre.com
Subject: Re: [PATCH 15/15] iio: adc: ad4030: Add support for ADAQ4216 and
ADAQ4224
Hi Andy, thank you for your review.
On 08/30, Andy Shevchenko wrote:
> On Sat, Aug 30, 2025 at 3:46 AM Marcelo Schmitt
> <marcelo.schmitt@...log.com> wrote:
> >
> > ADAQ4216 and ADAQ4224 are similar to AD4030, but feature a PGA circuitry
> > that scales the analog input signal prior to it reaching the ADC. The PGA
> > is controlled through a pair of pins (A0 and A1) whose state define the
> > gain that is applied to the input signal.
> >
> > Add support for ADAQ4216 and ADAQ4224. Provide a list of PGA options
> > through the IIO device channel scale available interface and enable control
> > of the PGA through the channel scale interface.
>
...
>
> > +/* HARDWARE_GAIN */
> > +#define ADAQ4616_PGA_PINS 2
> > +#define ADAQ4616_GAIN_MAX_NANO 6666666667
>
> Can we use calculus instead (people can't count properly after 3 :-)?
> Something like this
>
> (NANO * 2 / 3) // whoever in the above it's 20 and this puzzles me how
> something with _NANO can be so big :-)
>
Yeah, the max gain could be expressed in MILLI, but maybe I'll just do 20000 / 9
(or equivalent) as you suggested below and drop ADAQ4616_GAIN_MAX_NANO.
I'll also comply with your suggestions to this and other patches.
Thanks,
Marcelo
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