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Message-Id: <20250902-phy-hdptx-frl-v4-0-7d69176373ce@collabora.com>
Date: Tue, 02 Sep 2025 23:44:35 +0300
From: Cristian Ciocaltea <cristian.ciocaltea@...labora.com>
To: Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>,
Heiko Stuebner <heiko@...ech.de>, Algea Cao <algea.cao@...k-chips.com>,
Dmitry Baryshkov <lumag@...nel.org>
Cc: kernel@...labora.com, linux-phy@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org
Subject: [PATCH v4 00/11] Add HDMI 2.1 FRL support to
phy-rockchip-samsung-hdptx
The Samsung HDMI/eDP Transmitter Combo PHY is capable of handling four
HDMI 2.1 Fixed Rate Link (FRL) lanes, while each lane can operate at
3Gbps, 6Gbps, 8Gbps, 10Gbps or 12Gbps.
This patchset extends the HDMI PHY configuration API to manage the FRL
mode and provides all the required HDMI driver changes to enable FRL in
addition to the already supported TMDS mode.
Also note that since v4 the series depends on the fixes provided by [1].
Please see the changelog below for more details.
[1] https://lore.kernel.org/r/20250902-phy-hdptx-fixes-v1-0-e8d9ef9748d6@collabora.com
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@...labora.com>
---
Changes in v4:
- Moved the following fixup patches into a separate series [1]:
* Fix reported clock rate in high bpc mode
* Reduce ROPLL loop bandwidth
* Prevent Inter-Pair Skew from exceeding the limits
- Renamed enum phy_mode_hdmi to phy_hdmi_mode and
PHY_MODE_HDMI_{TMDS|FRL} to PHY_HDMI_MODE_{TMDS|FRL} (Dmitry)
- Rebased remaining patches onto next-20250901
- Link to v3: https://lore.kernel.org/r/20250818-phy-hdptx-frl-v3-0-c79997d8bb2b@collabora.com
Changes in v3:
- Reworked patch "phy: hdmi: Add HDMI 2.1 FRL configuration options"
according to Dmitry's feedback
* Updated commit message providing a brief description of FRL mode
* Kept PHY_MODE_HDMI in enum phy_mode and introduced enum
phy_mode_hdmi defining the TMDS and FRL submodes
- Updated "phy: rockchip: samsung-hdptx: Add HDMI 2.1 FRL support"
* Implemented .set_mode() callback in rk_hdptx_phy_ops
* Introduced .mode member in struct rk_hdptx_hdmi_cfg and used it
instead of phy_get_mode() to verify PHY_MODE_HDMI_FRL
- Rebased series onto next-20250818
- Link to v2: https://lore.kernel.org/r/20250805-phy-hdptx-frl-v2-0-d118bd4b6e0b@collabora.com
Changes in v2:
- Added a couple of new patches:
* Fix reported clock rate in high bpc mode
* Drop hw_rate driver data
- Applied several tweaks to the following patches:
* Compute clk rate from PLL config
* Switch to driver specific HDMI config
* Add HDMI 2.1 FRL support
- Rebased series onto next-20250804
- Link to v1: https://lore.kernel.org/r/20250708-phy-hdptx-frl-v1-0-cfe096e224f4@collabora.com
---
Cristian Ciocaltea (11):
phy: hdmi: Add HDMI 2.1 FRL configuration options
phy: rockchip: samsung-hdptx: Use usleep_range() instead of udelay()
phy: rockchip: samsung-hdptx: Fix coding style alignment
phy: rockchip: samsung-hdptx: Consistently use [rk_]hdptx_[tmds_] prefixes
phy: rockchip: samsung-hdptx: Enable lane output in common helper
phy: rockchip: samsung-hdptx: Cleanup *_cmn_init_seq lists
phy: rockchip: samsung-hdptx: Compute clk rate from PLL config
phy: rockchip: samsung-hdptx: Drop hw_rate driver data
phy: rockchip: samsung-hdptx: Switch to driver specific HDMI config
phy: rockchip: samsung-hdptx: Extend rk_hdptx_phy_verify_hdmi_config() helper
phy: rockchip: samsung-hdptx: Add HDMI 2.1 FRL support
drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 684 ++++++++++++++++++----
include/linux/phy/phy-hdmi.h | 19 +-
2 files changed, 603 insertions(+), 100 deletions(-)
---
base-commit: 58f59f0f890f0a80b28743261bd8800f5a1ed7fb
change-id: 20250708-phy-hdptx-frl-fc3377db9f2e
prerequisite-change-id: 20250902-phy-hdptx-fixes-7308ffea4c6a:v1
prerequisite-patch-id: 777b4d364feed432f604f87d58a6474cf8457431
prerequisite-patch-id: 7dafe85f5c9ac1291fd1b141a0e0fe68a4a837a9
prerequisite-patch-id: f4446206cbc7ceb41315085322fec45c72ec734c
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