[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20250902-phy-hdptx-frl-v4-5-7d69176373ce@collabora.com>
Date: Tue, 02 Sep 2025 23:44:40 +0300
From: Cristian Ciocaltea <cristian.ciocaltea@...labora.com>
To: Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>,
Heiko Stuebner <heiko@...ech.de>, Algea Cao <algea.cao@...k-chips.com>,
Dmitry Baryshkov <lumag@...nel.org>
Cc: kernel@...labora.com, linux-phy@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org
Subject: [PATCH v4 05/11] phy: rockchip: samsung-hdptx: Enable lane output
in common helper
In preparation to support FRL mode, move the PHY lane output enablement
from the TMDS specific configuration to the common *_post_enable_lane()
helper and make sure it gets turned off in *_phy_disable().
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@...labora.com>
---
drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
index 44fda739705abc86428fa6fb41c545aceafbb28f..574e468e5070d225aa5ce4d648aad2bcae851b4b 100644
--- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
+++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
@@ -829,6 +829,8 @@ static int rk_hdptx_post_enable_lane(struct rk_hdptx_phy *hdptx)
HDPTX_I_BIAS_EN | HDPTX_I_BGR_EN;
regmap_write(hdptx->grf, GRF_HDPTX_CON0, val);
+ regmap_write(hdptx->regmap, LNTOP_REG(0207), 0x0f);
+
ret = regmap_read_poll_timeout(hdptx->grf, GRF_HDPTX_STATUS, val,
(val & HDPTX_O_PHY_RDY) &&
(val & HDPTX_O_PLL_LOCK_DONE),
@@ -882,6 +884,7 @@ static void rk_hdptx_phy_disable(struct rk_hdptx_phy *hdptx)
usleep_range(20, 30);
reset_control_deassert(hdptx->rsts[RST_APB].rstc);
+ regmap_write(hdptx->regmap, LNTOP_REG(0207), 0x0);
regmap_write(hdptx->regmap, LANE_REG(0300), 0x82);
regmap_write(hdptx->regmap, SB_REG(010f), 0xc1);
regmap_write(hdptx->regmap, SB_REG(0110), 0x1);
@@ -1059,7 +1062,6 @@ static int rk_hdptx_tmds_ropll_mode_config(struct rk_hdptx_phy *hdptx)
}
regmap_write(hdptx->regmap, LNTOP_REG(0206), 0x07);
- regmap_write(hdptx->regmap, LNTOP_REG(0207), 0x0f);
rk_hdptx_multi_reg_write(hdptx, rk_hdptx_common_lane_init_seq);
rk_hdptx_multi_reg_write(hdptx, rk_hdptx_tmds_lane_init_seq);
--
2.51.0
Powered by blists - more mailing lists