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Message-ID: <20250902083554.GD13448@pendragon.ideasonboard.com>
Date: Tue, 2 Sep 2025 10:35:54 +0200
From: Laurent Pinchart <laurent.pinchart@...asonboard.com>
To: Frank Li <Frank.li@....com>
Cc: Guoniu Zhou <guoniu.zhou@....com>, Rui Miguel Silva <rmfrfs@...il.com>,
Martin Kepplinger <martink@...teo.de>,
Purism Kernel Team <kernel@...i.sm>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
Philipp Zabel <p.zabel@...gutronix.de>, linux-media@...r.kernel.org,
devicetree@...r.kernel.org, imx@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v5 1/4] media: dt-bindings: nxp,imx8mq-mipi-csi2: Add
i.MX8ULP compatible string
On Mon, Sep 01, 2025 at 09:45:39PM -0400, Frank Li wrote:
> On Mon, Sep 01, 2025 at 05:46:10PM +0200, Laurent Pinchart wrote:
> > On Mon, Sep 01, 2025 at 02:25:29PM +0800, Guoniu Zhou wrote:
> > > The CSI-2 receiver in the i.MX8ULP is almost identical to the version
> > > present in the i.MX8QXP/QM, but i.MX8ULP CSI-2 controller needs pclk
> > > clock as the input clock for its APB interface of Control and Status
> > > register(CSR). So add compatible string fsl,imx8ulp-mipi-csi2 and
> > > increase maxItems of Clocks (clock-names) to 4 from 3. And keep the
> > > same restriction for existed compatible.
> >
> > s/existed/existing/
> >
> > > Signed-off-by: Guoniu Zhou <guoniu.zhou@....com>
> > > ---
> > > .../bindings/media/nxp,imx8mq-mipi-csi2.yaml | 46 ++++++++++++++++++++--
> > > 1 file changed, 43 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml
> > > index 3389bab266a9adbda313c8ad795b998641df12f3..412cedddb0efee1a49d1b90b02baa7a625c797ec 100644
> > > --- a/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml
> > > +++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-mipi-csi2.yaml
> > > @@ -21,7 +21,9 @@ properties:
> > > - fsl,imx8mq-mipi-csi2
> > > - fsl,imx8qxp-mipi-csi2
> > > - items:
> > > - - const: fsl,imx8qm-mipi-csi2
> > > + - enum:
> > > + - fsl,imx8qm-mipi-csi2
> > > + - fsl,imx8ulp-mipi-csi2
> > > - const: fsl,imx8qxp-mipi-csi2
> >
> > According to this, the ULP version is compatible with the QXP version.
> >
> > >
> > > reg:
> > > @@ -39,12 +41,16 @@ properties:
> > > clock that the RX DPHY receives.
> > > - description: ui is the pixel clock (phy_ref up to 333Mhz).
> > > See the reference manual for details.
> > > + - description: pclk is clock for csr APB interface.
> > > + minItems: 3
> > >
> > > clock-names:
> > > items:
> > > - const: core
> > > - const: esc
> > > - const: ui
> > > + - const: pclk
> > > + minItems: 3
> > >
> > > power-domains:
> > > maxItems: 1
> > > @@ -130,19 +136,53 @@ allOf:
> > > compatible:
> > > contains:
> > > enum:
> > > - - fsl,imx8qxp-mipi-csi2
> > > + - fsl,imx8ulp-mipi-csi2
> > > + then:
> > > + properties:
> > > + reg:
> > > + minItems: 2
> > > + resets:
> > > + minItems: 2
> > > + maxItems: 2
> > > + clocks:
> > > + minItems: 4
> > > + clock-names:
> > > + minItems: 4
> >
> > But according to this, the ULP version requires more clocks than the QXP
> > version.
>
> If only clock number difference, generally, it is still compatible and can
> be fallback, especialy driver use devm_bulk_clk_get_all().
That's a driver-specific implementation decision, so I don't think it
should be taken into account to decide on compatibility.
> If driver have not sperated drvdata for it, we can fallback to it. It is
> quite common.
>
> > > +
> > > + - if:
> > > + properties:
> > > + compatible:
> > > + contains:
> > > + enum:
> > > + - fsl,imx8qm-mipi-csi2
> >
> > QM is compatible with the QXP, so you don't need to list it here.
> >
> > contains:
> > const: fsl,imx8qxp-mipi-csi2
> >
> > is enough to cover both.
> >
> > > + const: fsl,imx8qxp-mipi-csi2
> > > then:
> > > properties:
> > > reg:
> > > minItems: 2
> > > resets:
> > > maxItems: 1
> > > - else:
> > > + clocks:
> > > + maxItems: 3
> > > + clock-names:
> > > + maxItems: 3
> > > +
> > > + - if:
> > > + properties:
> > > + compatible:
> > > + contains:
> > > + enum:
> > > + - fsl,imx8mq-mipi-csi2
> > > + then:
> > > properties:
> > > reg:
> > > maxItems: 1
> > > resets:
> > > minItems: 3
> > > + clocks:
> > > + maxItems: 3
> > > + clock-names:
> > > + maxItems: 3
> > > required:
> > > - fsl,mipi-phy-gpr
> > >
--
Regards,
Laurent Pinchart
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