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Message-ID: <455375d4-c558-4d0e-9284-23905c8d0bac@linaro.org>
Date: Tue, 2 Sep 2025 13:59:04 +0200
From: Neil Armstrong <neil.armstrong@...aro.org>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
Andrzej Hajda <andrzej.hajda@...el.com>, Robert Foss <rfoss@...nel.org>,
Laurent Pinchart <Laurent.pinchart@...asonboard.com>,
Jonas Karlman <jonas@...boo.se>, Jernej Skrabec <jernej.skrabec@...il.com>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>,
David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>
Cc: dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-phy@...ts.infradead.org
Subject: Re: [PATCH v2 3/5] dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy:
Document static lanes mapping
On 02/09/2025 13:50, Konrad Dybcio wrote:
> On 9/2/25 11:00 AM, Neil Armstrong wrote:
>> The QMP USB3/DP Combo PHY hosts an USB3 phy and a DP PHY on top
>> of a combo glue to route either lanes to the 4 shared physical lanes.
>>
>> The routing of the lanes can be:
>> - 2 DP + 2 USB3
>> - 4 DP
>> - 2 USB3
>>
>> The layout of the lanes was designed to be mapped and swapped
>> related to the USB-C Power Delivery negociation, so it supports
>> a finite set of mappings inherited by the USB-C Altmode layouts.
>>
>> Nevertheless those QMP Comby PHY can be statically used to
>> drive a DisplayPort connector, DP->HDMI bridge, USB3 A Connector,
>> etc... without an USB-C connector and no PD events.
>>
>> Add a property that documents the static lanes mapping to
>> each underlying PHY to allow supporting boards directly
>> connecting USB3 and DisplayPort lanes to the QMP Combo
>> lanes.
>>
>> Signed-off-by: Neil Armstrong <neil.armstrong@...aro.org>
>> ---
>> .../phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml | 29 ++++++++++++++++++++++
>> 1 file changed, 29 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml
>> index c8bc512df08b5694c8599f475de78679a4438449..12511a462bc6245e0b82726d053d8605148c5047 100644
>> --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml
>> +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml
>> @@ -76,6 +76,35 @@ properties:
>> mode-switch: true
>> orientation-switch: true
>>
>> + qcom,static-lanes-mapping:
>> + $ref: /schemas/types.yaml#/definitions/uint32-array
>> + minItems: 4
>> + items:
>> + enum:
>> + - 0 # Unconnected (PHY_NONE)
>> + - 4 # USB3 (PHY_TYPE_USB3)
>> + - 6 # DisplayPort (PHY_TYPE_DP)
>> + description:
>> + Describes the static mapping of the Combo PHY lanes, when not used
>> + a in a Type-C dynamic setup using USB-C PD Events to change the mapping.
>> + The 4 lanes can either routed to the underlying DP PHY or the USB3 PHY.
>> + Only 2 of the lanes can be connected to the USB3 PHY, but the 4 lanes can
>> + be connected to the DP PHY.
>> + The numbers corresponds to the PHY Type the lanes are connected to.
>> + The possible combinations are
>> + <0 0 0 0> when none are connected
>> + <4 4 0 6> USB3 and DP single lane
>> + <4 4 6 6> USB3 and DP
>> + <6 6 4 4> DP and USB3
>> + <6 0 4 4> DP and USB3 single lane
>> + <4 4 0 0> USB3 Only
>> + <0 0 4 4> USB3 Only
>> + <6 0 0 0> DP single lane
>> + <0 0 0 6> DP single lane
>> + <6 6 0 0> DP 2 lanes
>> + <0 0 6 6> DP 2 lanes
>> + <6 6 6 6> DP 4 lanes
>
> Would
>
> oneOf:
> - [0, 0, 0, 0]
> - ...
>
> or something similar work here?
I need to check, but I may need to do that instead:
oneOf:
- items:
- 0
- 0
- 0
- 0
- items:
- 4
- 4
- 6
- 6
...
But I want to be extra sure this is the right path before
Neil
>
> Konrad
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